39 lines
923 B
C
39 lines
923 B
C
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/*
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* Copyright 2021 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef DDR_IO_H
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#define DDR_IO_H
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#include <endian.h>
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#include <lib/mmio.h>
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#define min(a, b) (((a) > (b)) ? (b) : (a))
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#define max(a, b) (((a) > (b)) ? (a) : (b))
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/* macro for memory barrier */
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#define mb() asm volatile("dsb sy" : : : "memory")
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#ifdef NXP_DDR_BE
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#define ddr_in32(a) bswap32(mmio_read_32((uintptr_t)(a)))
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#define ddr_out32(a, v) mmio_write_32((uintptr_t)(a),\
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bswap32(v))
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#elif defined(NXP_DDR_LE)
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#define ddr_in32(a) mmio_read_32((uintptr_t)(a))
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#define ddr_out32(a, v) mmio_write_32((uintptr_t)(a), v)
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#else
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#error Please define CCSR DDR register endianness
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#endif
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#define ddr_setbits32(a, v) ddr_out32((a), ddr_in32(a) | (v))
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#define ddr_clrbits32(a, v) ddr_out32((a), ddr_in32(a) & ~(v))
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#define ddr_clrsetbits32(a, c, s) ddr_out32((a), (ddr_in32(a) & ~(c)) \
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#endif /* DDR_IO_H */
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