108 lines
3.2 KiB
C
108 lines
3.2 KiB
C
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/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H
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#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H
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/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */
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#include "../lib/utils_def_exp.h"
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#include "param_header_exp.h"
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the
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* 'entry_point_info' structure at their correct offsets.
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******************************************************************************/
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#define ENTRY_POINT_INFO_PC_OFFSET U(0x08)
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#ifdef __aarch64__
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#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18)
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#else
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#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10)
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#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14)
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#endif
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/* Security state of the image. */
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#define EP_SECURITY_MASK UL(0x1)
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#define EP_SECURITY_SHIFT UL(0)
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#define EP_SECURE UL(0x0)
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#define EP_NON_SECURE UL(0x1)
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/* Endianness of the image. */
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#define EP_EE_MASK U(0x2)
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#define EP_EE_SHIFT U(1)
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#define EP_EE_LITTLE U(0x0)
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#define EP_EE_BIG U(0x2)
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#define EP_GET_EE(x) ((x) & EP_EE_MASK)
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#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
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/* Enable or disable access to the secure timer from secure images. */
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#define EP_ST_MASK U(0x4)
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#define EP_ST_SHIFT U(2)
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#define EP_ST_DISABLE U(0x0)
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#define EP_ST_ENABLE U(0x4)
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#define EP_GET_ST(x) ((x) & EP_ST_MASK)
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#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
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/* Determine if an image is executable or not. */
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#define EP_EXE_MASK U(0x8)
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#define EP_EXE_SHIFT U(3)
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#define EP_NON_EXECUTABLE U(0x0)
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#define EP_EXECUTABLE U(0x8)
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#define EP_GET_EXE(x) ((x) & EP_EXE_MASK)
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#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee))
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/* Flag to indicate the first image that is executed. */
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#define EP_FIRST_EXE_MASK U(0x10)
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#define EP_FIRST_EXE_SHIFT U(4)
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#define EP_FIRST_EXE U(0x10)
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#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK)
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#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee))
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#ifndef __ASSEMBLER__
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typedef struct aapcs64_params {
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uint64_t arg0;
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uint64_t arg1;
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uint64_t arg2;
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uint64_t arg3;
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uint64_t arg4;
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uint64_t arg5;
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uint64_t arg6;
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uint64_t arg7;
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} aapcs64_params_t;
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typedef struct aapcs32_params {
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uint32_t arg0;
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uint32_t arg1;
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uint32_t arg2;
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uint32_t arg3;
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} aapcs32_params_t;
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/*****************************************************************************
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* This structure represents the superset of information needed while
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* switching exception levels. The only two mechanisms to do so are
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* ERET & SMC. Security state is indicated using bit zero of header
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* attribute
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* NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
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* of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
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* processing SMC to jump to BL31.
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*****************************************************************************/
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typedef struct entry_point_info {
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param_header_t h;
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uintptr_t pc;
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uint32_t spsr;
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#ifdef __aarch64__
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aapcs64_params_t args;
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#else
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uintptr_t lr_svc;
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aapcs32_params_t args;
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#endif
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} entry_point_info_t;
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#endif /*__ASSEMBLER__*/
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#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H */
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