117 lines
3.0 KiB
ArmAsm
117 lines
3.0 KiB
ArmAsm
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/*
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* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/bl_common.ld.h>
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#include <lib/xlat_tables/xlat_tables_defs.h>
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OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
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OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
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ENTRY(bl31_entrypoint)
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MEMORY {
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RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_TZRAM_SIZE
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RAM2 (rwx): ORIGIN = TZRAM2_BASE, LENGTH = TZRAM2_SIZE
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}
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SECTIONS
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{
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. = BL31_BASE;
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ASSERT(. == ALIGN(2048),
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"vector base is not aligned on a 2K boundary.")
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__RO_START__ = .;
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vector . : {
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*(.vectors)
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} >RAM
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ASSERT(. == ALIGN(PAGE_SIZE),
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"BL31_BASE address is not aligned on a page boundary.")
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ro . : {
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*bl31_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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RODATA_COMMON
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__RO_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked as read-only,
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* executable. No RW data from the next section must creep in.
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* Ensure the rest of the current memory page is unused.
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*/
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. = ALIGN(PAGE_SIZE);
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__RO_END__ = .;
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} >RAM
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ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
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"cpu_ops not defined for this platform.")
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/*
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* Define a linker symbol to mark start of the RW memory area for this
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* image.
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*/
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__RW_START__ = . ;
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DATA_SECTION >RAM
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#ifdef BL31_PROGBITS_LIMIT
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ASSERT(. <= BL31_PROGBITS_LIMIT, "BL3-1 progbits has exceeded its limit.")
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#endif
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STACK_SECTION >RAM
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BSS_SECTION >RAM
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__RW_END__ = __BSS_END__;
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ASSERT(. <= BL31_LIMIT, "BL3-1 image has exceeded its limit.")
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XLAT_TABLE_SECTION >RAM2
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#if USE_COHERENT_MEM
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/*
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* The base address of the coherent memory section must be page-aligned (4K)
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* to guarantee that the coherent data are stored on their own pages and
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* are not mixed with normal data. This is required to set up the correct
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* memory attributes for the coherent data page tables.
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*/
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coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
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__COHERENT_RAM_START__ = .;
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/*
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* Bakery locks are stored in coherent memory
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*
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* Each lock's data is contiguous and fully allocated by the compiler
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*/
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*(bakery_lock)
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*(tzfw_coherent_mem)
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__COHERENT_RAM_END_UNALIGNED__ = .;
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/*
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* Memory page(s) mapped to this section will be marked
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* as device memory. No other unexpected data must creep in.
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* Ensure the rest of the current memory page is unused.
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*/
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. = ALIGN(PAGE_SIZE);
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__COHERENT_RAM_END__ = .;
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} >RAM2
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#endif
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/*
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* Define a linker symbol to mark end of the RW memory area for this
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* image.
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*/
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__BL31_END__ = .;
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__BSS_SIZE__ = SIZEOF(.bss);
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#if USE_COHERENT_MEM
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__COHERENT_RAM_UNALIGNED_SIZE__ =
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__COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
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#endif
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ASSERT(. <= TZRAM2_LIMIT, "TZRAM2 image has exceeded its limit.")
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}
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