// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
 *
 */

//#include "../rk3562-evb1-lp4x-v10.dtsi"
//#include "../rk3562-android.dtsi"
//#include "../rk3562-rk817.dtsi"
#include <dt-bindings/gpio/nca9555-gpio.h>

#include "rk3562-evb-rpdzkj-rk817-pwm.dtsi"
#include "../rk3562-android.dtsi"

/*** usb ***/
#include "rp-usb-rk3562.dtsi"

/*************************adc key***********************/
#include "rp-adc-key.dtsi"

/* camera */
#include "rp-mipi-camera0-gc2093-imx334-imx415-rk3562.dtsi"   //not isp-iq-json 
#include "rp-mipi-camera1-gc2093-imx334-imx415-rk3562.dtsi"   //not isp-iq-json	

/* ethernet */
#include "rp-eth-gmac.dtsi"
#include "rp-eth-pcie2gmac-rk3562.dtsi"

/* wifi/bt */
#include "rp-wifi-bt-vs2275s-rk3562.dtsi"

/***************** SINGLE LCD ****************/
#include "pro-rk3562-single-lcd-gpio.dtsi"      // gpio config of lcd

/* MIPI DSI */
//#include "rp-lcd-mipi-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi-7-1024-600.dtsi"
//#include "rp-lcd-mipi-7-1200-1920.dtsi"
//#include "rp-lcd-mipi-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi-8-1200-1920.dtsi"
//#include "rp-lcd-mipi-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi-10-1200-1920.dtsi"

/{

    model = "pro-rk3562";
    compatible = "rpdzkj,pro-rk3562-v10", "rockchip,rk3562";
	/*
	fan_gpio_control {
            compatible = "fan_gpio_control";
            gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
            temperature-device = "soc-thermal";
            temp-on = <60000>;
            time = <10000>;
            status = "okay";
        };
	*/

	vdd_3v3_5v_control: vdd-3v3-5v-control {
                compatible = "regulator-fixed";
                regulator-name = "vdd_3v3_5v_control";
        	regulator-always-on;
                regulator-boot-on;
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                enable-active-high;
        	gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;    //In the uboot phase fixed.c resolves gpio
                gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
        	pinctrl-names = "default";
        	pinctrl-0 = <&vdd_control>;
        };

	rp_power{
                status = "okay";
                compatible = "rp_power";
                rp_not_deep_sleep = <1>;
	//	pinctrl-names = "default";
	//	pinctrl-0 = <&vcc5v0_host_en>;
	//	pinctrl-1 = <&vcc5v0_otg_en>;

	//#define GPIO_FUNCTION_OUTPUT 0
	//#define GPIO_FUNCTION_INPUT 1
	//#define GPIO_FUNCTION_IRQ 2
	//#define GPIO_FUNCTION_FLASH 3
	//#define GPIO_FUNCTION_OUTPUT_CTRL 4


                led {    //system led
                        gpio_num = <&nca9555_gpio IO_00 GPIO_ACTIVE_HIGH>;
                        gpio_function = <3>;
                };
		
		vdd_4g {     
                        gpio_num = <&nca9555_gpio IO_01 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };

		usb_pwr {  
                        gpio_num = <&nca9555_gpio IO_03 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };

		hub_rst {    //usb hub
                        gpio_num = <&nca9555_gpio IO_02 GPIO_ACTIVE_LOW>;
                        gpio_function = <4>;
                };

		spk_en {       //spk enable
                        gpio_num = <&nca9555_gpio IO_14 GPIO_ACTIVE_HIGH>;
                        gpio_function = <4>;
                };

               // fan {    //fan
               //         gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
               //         gpio_function = <4>;
               // };
		
	};

	rp_gpio{
                status = "okay";
                compatible = "rp_gpio";

		 nca9555_15 {    
                        gpio_num = <&nca9555_gpio IO_15 GPIO_ACTIVE_HIGH>;
                        gpio_function = <0>;
                };

                nca9555_16 {    
                        gpio_num = <&nca9555_gpio IO_16 GPIO_ACTIVE_HIGH>;
                        gpio_function = <0>;
                };

                nca9555_17 {      
                        gpio_num = <&nca9555_gpio IO_17 GPIO_ACTIVE_HIGH>;
                        gpio_function = <0>;
                };

        };


	fiq-debugger {
                compatible = "rockchip,fiq-debugger";
                rockchip,serial-id = <0>;
                rockchip,wake-irq = <0>;
                /* If enable uart uses irq instead of fiq */
                rockchip,irq-mode-enable = <1>;
                rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
                interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
                pinctrl-names = "default";
                pinctrl-0 = <&uart0m0_xfer>;
                status = "okay";
        };
};


&i2c1 {
    status = "okay";
        rtc@51 {
                status = "okay";
                compatible = "rtc,hym8563";
                reg = <0x51>;
        };

	nca9555: mfd-gpio@20 {
        	compatible = "nca9555";
        	reg = <0x20>;
        	status = "okay";

        	nca9555_gpio: gpio-normal@20 {
            		compatible = "nca9555-gpio";
            		gpio-controller;
            		#gpio-cells = <2>;
        	};
    	};
};

&i2c2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&i2c2m1_xfer>;
    	status = "okay";
};

/*** RS232 ***/
&uart2 {
	status = "okay";
    	pinctrl-names = "default";
  	pinctrl-0 = <&uart2m1_xfer>;
};

&uart3 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&uart3m0_xfer>;
};

/*** TTL ***/
&uart4 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&uart4m0_xfer>;
};

&uart5 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&uart5m1_xfer>;
};

&uart6 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&uart6m0_xfer>;
};

&uart7 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&uart7m0_xfer>;
};

&rk_headset {
    pinctrl-names = "default";
    pinctrl-0 = <&hp_det>;
    headset_gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
};

&spi0 {
        status = "okay";

        pinctrl-0 = <&spi0m0_csn0 &spi0m0_csn1 &spi0m0_pins>;
        spi_dev@0 {
                compatible = "rockchip,spidev";
                reg = <0>;
                spi-max-frequency = <12000000>;
                spi-lsb-first;
        };
};

/******** must be close,if not system no run ******/
&dmc {
       center-supply = <&vdd_logic>;
       status = "disabled";
};

&dfi {
       status = "disabled";
};


&pinctrl {
    power_control{
        vdd_control: vdd-control {
            rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
        };
    };

    headphone {
        hp_det: hp-det {
            rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
        };
    };
};