195 lines
4.1 KiB
ArmAsm
195 lines
4.1 KiB
ArmAsm
@/*****************************************************************************
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@*
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@* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
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@*
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@* Licensed under the Apache License, Version 2.0 (the "License");
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@* you may not use this file except in compliance with the License.
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@* You may obtain a copy of the License at:
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@*
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@* http://www.apache.org/licenses/LICENSE-2.0
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@*
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@* Unless required by applicable law or agreed to in writing, software
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@* distributed under the License is distributed on an "AS IS" BASIS,
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@* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@* See the License for the specific language governing permissions and
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@* limitations under the License.
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@*
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@*****************************************************************************/
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@/**
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@/*******************************************************************************
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@* @file
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@* ihevcd_itrans_recon_dc_luma.s
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@*
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@* @brief
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@* contains function definitions itrans and recon for dc only case
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@*
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@* @author
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@* ittiam
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@*
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@* @par list of functions:
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@*
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@*
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@* @remarks
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@* none
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@*
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@*******************************************************************************/
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.text
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.globl ihevcd_itrans_recon_dc_luma_a9q
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.type ihevcd_itrans_recon_dc_luma_a9q, %function
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ihevcd_itrans_recon_dc_luma_a9q:
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@void ihevcd_itrans_recon_dc_luma(uword8 *pu1_pred,
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@ uword8 *pu1_dst,
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@ word32 pred_strd,
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@ word32 dst_strd,
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@ word32 log2_trans_size,
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@ word16 i2_coeff_value)
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@r0:pu1_pred
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@r1:pu1_dest
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@r2:pred_strd
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@r3:dst_strd
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push {r0-r11,lr}
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vpush {d8-d15}
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ldr r4,[sp,#0x74] @loads log2_trans_size
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ldr r5,[sp,#0x78] @ loads i2_coeff_value
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mov r10,#1
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lsl r4,r10,r4 @ trans_size = (1 << log2_trans_size)@
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mov r6,#64 @ 1 << (shift1 - 1)@
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mov r7,#2048 @ 1<<(shift2-1)
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add r8,r6,r5,lsl #6
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ssat r8,#16,r8,asr #7
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add r5,r7,r8,lsl #6
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ssat r6,#16,r5,asr #12
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mov r9,r4
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mov r8,r4
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@ r6 has the dc_value
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@ r4 has the trans_size value
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@ r8 has the row value
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@ r9 has the col value
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vdup.s16 q0,r6
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cmp r4,#4
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beq row_loop_4
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row_loop:
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mov r9,r4
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col_loop:
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mov r7,r0
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vld1.8 d2,[r7],r2
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vld1.8 d3,[r7],r2
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vld1.8 d4,[r7],r2
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vld1.8 d5,[r7],r2
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vld1.8 d6,[r7],r2
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vld1.8 d7,[r7],r2
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vld1.8 d8,[r7],r2
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vld1.8 d9,[r7]
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add r0,r0,#8
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vaddw.u8 q15,q0,d2
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vaddw.u8 q14,q0,d3
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vaddw.u8 q13,q0,d4
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vaddw.u8 q12,q0,d5
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vaddw.u8 q11,q0,d6
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vaddw.u8 q10,q0,d7
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vaddw.u8 q9,q0,d8
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vaddw.u8 q8,q0,d9
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mov r11,r1
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vqmovun.s16 d2,q15
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vqmovun.s16 d3,q14
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vqmovun.s16 d4,q13
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vqmovun.s16 d5,q12
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vqmovun.s16 d6,q11
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vqmovun.s16 d7,q10
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vqmovun.s16 d8,q9
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vqmovun.s16 d9,q8
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vst1.u32 {d2},[r11],r3
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vst1.u32 {d3},[r11],r3
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vst1.u32 {d4},[r11],r3
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vst1.u32 {d5},[r11],r3
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vst1.u32 {d6},[r11],r3
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vst1.u32 {d7},[r11],r3
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vst1.u32 {d8},[r11],r3
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vst1.u32 {d9},[r11]
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add r1,r1,#8
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subs r9,r9,#8
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bgt col_loop
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subs r8,r8,#8
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add r0,r0,r2,lsl #3
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add r1,r1,r3,lsl #3
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sub r0,r0,r4
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sub r1,r1,r4
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bgt row_loop
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b end_loops
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row_loop_4:
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mov r9,r10
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col_loop_4:
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vld1.8 d2,[r0],r2
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vld1.8 d3,[r0],r2
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vld1.8 d4,[r0],r2
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vld1.8 d5,[r0]
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vaddw.u8 q15,q0,d2
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vaddw.u8 q14,q0,d3
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vaddw.u8 q13,q0,d4
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vaddw.u8 q12,q0,d5
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vqmovun.s16 d2,q15
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vqmovun.s16 d3,q14
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vqmovun.s16 d4,q13
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vqmovun.s16 d5,q12
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vst1.u32 {d2[0]},[r1],r3
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vst1.u32 {d3[0]},[r1],r3
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vst1.u32 {d4[0]},[r1],r3
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vst1.u32 {d5[0]},[r1]
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end_loops:
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vpop {d8-d15}
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pop {r0-r11,pc}
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