124 lines
7.0 KiB
C++
124 lines
7.0 KiB
C++
/*
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* Copyright (c) 2019 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef ARM_COMPUTE_NEDEPTHWISECONVOLUTIONASSEMBLYDISPATCH_H
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#define ARM_COMPUTE_NEDEPTHWISECONVOLUTIONASSEMBLYDISPATCH_H
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#include "arm_compute/runtime/IFunction.h"
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#include "arm_compute/runtime/IMemoryManager.h"
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#include "arm_compute/runtime/MemoryGroup.h"
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#include "arm_compute/runtime/Tensor.h"
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namespace arm_compute
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{
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/** Depthwise convolution assembly kernel glue */
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class NEDepthwiseConvolutionAssemblyDispatch : public IFunction
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{
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public:
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/** Default constructor
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*
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* @param[in,out] memory_manager Memory manager to use
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*/
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NEDepthwiseConvolutionAssemblyDispatch(std::shared_ptr<IMemoryManager> memory_manager = nullptr);
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/** Prevent instances of this class from being copied (As this class contains pointers) */
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NEDepthwiseConvolutionAssemblyDispatch(const NEDepthwiseConvolutionAssemblyDispatch &) = delete;
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/** Default move constructor */
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NEDepthwiseConvolutionAssemblyDispatch(NEDepthwiseConvolutionAssemblyDispatch &&) = default;
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/** Prevent instances of this class from being copied (As this class contains pointers) */
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NEDepthwiseConvolutionAssemblyDispatch &operator=(const NEDepthwiseConvolutionAssemblyDispatch &) = delete;
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/** Default move assignment operator */
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NEDepthwiseConvolutionAssemblyDispatch &operator=(NEDepthwiseConvolutionAssemblyDispatch &&) = default;
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/** Default destructor */
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~NEDepthwiseConvolutionAssemblyDispatch();
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/** Initialize the function's source, destination, kernels and border_size.
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*
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* @note Supports only NHWC format
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*
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* @param[in] input Source tensor. Data type supported: QASYMM8/F16/F32. (Written to only for border filling).
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* @param[in] weights Weights tensor. These are 3D tensors with shape [W, H, IFM]. Data type supported: Same as @p input.
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* @param[in] bias (Optional) Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
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* Data type supported: Same as @p input.
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* @param[out] output Destination tensor. Data type supported: same as @p input.
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* @param[in] conv_info Padding and stride information to use for the convolution.
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* @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
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* @param[in] act_info (Optional) Activation layer information in case of a fused activation.
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* @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
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*/
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void configure(const ITensor *input, const ITensor *weights, const ITensor *bias, ITensor *output,
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const PadStrideInfo &conv_info, unsigned int depth_multiplier = 1, const ActivationLayerInfo &act_info = ActivationLayerInfo(),
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const Size2D &dilation = Size2D(1, 1));
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/** Static function to check if given info will lead to a valid configuration of @ref NEDepthwiseConvolutionAssemblyDispatch
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*
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* @note Supports only NHWC format
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*
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* @param[in] input Source tensor. Data type supported: QASYMM8/F16/F32. (Written to only for border filling).
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* @param[in] weights Weights tensor. These are 3D tensors with shape [W, H, IFM]. Data type supported: Same as @p input.
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* @param[in] bias (Optional) Biases tensor. A 1D tensor with shape [IFM]. Must be nullptr if not needed.
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* Data type supported: Same as @p input.
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* @param[out] output Destination tensor. Data type supported: same as @p input.
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* @param[in] conv_info Padding and stride information to use for the convolution.
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* @param[in] depth_multiplier (Optional) Multiplier to apply to the input's depth in order to retrieve the output's depth. Defaults to 1.
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* @param[in] act_info (Optional) Activation layer information in case of a fused activation.
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* @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
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*
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* @return An error status
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*/
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static Status validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *bias, const ITensorInfo *output,
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const PadStrideInfo &conv_info, unsigned int depth_multiplier = 1, const ActivationLayerInfo &act_info = ActivationLayerInfo(),
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const Size2D &dilation = Size2D(1, 1));
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/** Check if the optimized kernel can be used for the given kernel sizes and strides
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*
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* @warning Even if this return true the inputs and outputs might need to get permuted as the only layout supported is NHWC
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*
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* @param[in] input Input tensor info.
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* @param[in] weights Weights tensor info.
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* @param[in] conv_info Convolution layer metadata.
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* @param[in] depth_multiplier (Optional) Depth multiplier to be used.
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* @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1).
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*
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* @return True if the assembly kernel could be used else false. Note that transformations of input/output could be needed.
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*/
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static bool is_optimized_supported(const ITensorInfo *input, const ITensorInfo *weights, PadStrideInfo conv_info, unsigned int depth_multiplier = 1, const Size2D &dilation = Size2D(1, 1));
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// Inherited methods overridden:
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void run() override;
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void prepare() override;
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private:
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struct LocalImpl;
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private:
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MemoryGroup _memory_group;
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const ITensor *_input;
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const ITensor *_weights;
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const ITensor *_bias;
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ITensor *_output;
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Tensor _packed_weights;
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Tensor _workspace;
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bool _is_prepared;
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std::unique_ptr<LocalImpl> _pImpl;
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};
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} // namespace arm_compute
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#endif /* ARM_COMPUTE_NEDEPTHWISECONVOLUTIONASSEMBLYDISPATCH_H */
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