72 lines
2.2 KiB
LLVM
72 lines
2.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
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define i64 @test_free_zext(i8* %a, i16* %b) {
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; CHECK-LABEL: test_free_zext:
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; CHECK-DAG: ldrb w[[A:[0-9]+]], [x0]
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; CHECK: ldrh w[[B:[0-9]+]], [x1]
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; CHECK: add x0, x[[B]], x[[A]]
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%1 = load i8, i8* %a, align 1
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%conv = zext i8 %1 to i64
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%2 = load i16, i16* %b, align 2
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%conv1 = zext i16 %2 to i64
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%add = add nsw i64 %conv1, %conv
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ret i64 %add
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}
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define void @test_free_zext2(i32* %ptr, i32* %dst1, i64* %dst2) {
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; CHECK-LABEL: test_free_zext2:
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; CHECK: ldrh w[[A:[0-9]+]], [x0]
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; CHECK-NOT: and x
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; CHECK: str w[[A]], [x1]
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; CHECK: str x[[A]], [x2]
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%load = load i32, i32* %ptr, align 8
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%load16 = and i32 %load, 65535
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%load64 = zext i32 %load16 to i64
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store i32 %load16, i32* %dst1, align 4
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store i64 %load64, i64* %dst2, align 8
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ret void
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}
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; Test for CodeGenPrepare::optimizeLoadExt(): simple case: two loads
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; feeding a phi that zext's each loaded value.
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define i32 @test_free_zext3(i32* %ptr, i32* %ptr2, i32* %dst, i32 %c) {
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; CHECK-LABEL: test_free_zext3:
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bb1:
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; CHECK: ldrh [[REG:w[0-9]+]]
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; CHECK-NOT: and {{w[0-9]+}}, [[REG]], #0xffff
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%tmp1 = load i32, i32* %ptr, align 4
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%cmp = icmp ne i32 %c, 0
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br i1 %cmp, label %bb2, label %bb3
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bb2:
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; CHECK: ldrh [[REG2:w[0-9]+]]
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; CHECK-NOT: and {{w[0-9]+}}, [[REG2]], #0xffff
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%tmp2 = load i32, i32* %ptr2, align 4
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br label %bb3
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bb3:
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%tmp3 = phi i32 [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
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; CHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xffff
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%tmpand = and i32 %tmp3, 65535
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ret i32 %tmpand
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}
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; Test for CodeGenPrepare::optimizeLoadExt(): check case of zext-able
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; load feeding a phi in the same block.
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define void @test_free_zext4(i32* %ptr, i32* %ptr2, i32* %dst) {
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; CHECK-LABEL: test_free_zext4:
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; CHECK: ldrh [[REG:w[0-9]+]]
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; TODO: fix isel to remove final and XCHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xffff
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; CHECK: ldrh [[REG:w[0-9]+]]
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bb1:
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%load1 = load i32, i32* %ptr, align 4
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br label %loop
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loop:
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%phi = phi i32 [ %load1, %bb1 ], [ %load2, %loop ]
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%and = and i32 %phi, 65535
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store i32 %and, i32* %dst, align 4
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%load2 = load i32, i32* %ptr2, align 4
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%cmp = icmp ne i32 %and, 0
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br i1 %cmp, label %loop, label %end
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end:
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ret void
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}
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