64 lines
1.4 KiB
YAML
64 lines
1.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/rockchip,rv1106-cru.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: ROCKCHIP rv1106 Family Clock Control Module Binding
|
|
|
|
maintainers:
|
|
- Elaine Zhang <zhangqing@rock-chips.com>
|
|
- Heiko Stuebner <heiko@sntech.de>
|
|
|
|
description: |
|
|
The RV1106 clock controller generates the clock and also implements a
|
|
reset controller for SoC peripherals.
|
|
(examples: provide SCLK_UART2\PCLK_UART2 and SRST_P_UART2\SRST_S_UART2 for UART module)
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
|
to specify the clock which they consume. All available clocks are defined as
|
|
preprocessor macros in the dt-bindings/clock/rv1106-cru.h headers and can be
|
|
used in device tree sources.
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- rockchip,rv1106-cru
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
"#clock-cells":
|
|
const: 1
|
|
|
|
"#reset-cells":
|
|
const: 1
|
|
|
|
clocks: true
|
|
|
|
assigned-clocks:
|
|
minItems: 1
|
|
|
|
assigned-clock-parents:
|
|
minItems: 1
|
|
|
|
assigned-clock-rates:
|
|
minItems: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- "#clock-cells"
|
|
- "#reset-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
# Clock Control Module node:
|
|
- |
|
|
cru: clock-controller@ff3a0000 {
|
|
compatible = "rockchip,rv1106-cru";
|
|
reg = <0xff3a0000 0x20000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|