124 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			124 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * Configuation settings for the Renesas R7780MP board
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 *
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 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#ifndef __R7780RP_H
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#define __R7780RP_H
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#define CONFIG_CPU_SH7780	1
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#define CONFIG_R7780MP		1
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#define CONFIG_SYS_R7780MP_OLD_FLASH	1
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#define __LITTLE_ENDIAN__ 1
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_CONS_SCIF0	1
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#define CONFIG_ENV_OVERWRITE	1
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#define CONFIG_SYS_TEXT_BASE		0x0FFC0000
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#define CONFIG_SYS_SDRAM_BASE		(0x08000000)
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#define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PBSIZE		256
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#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
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#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
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/* Flash board support */
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#define CONFIG_SYS_FLASH_BASE		(0xA0000000)
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#ifdef CONFIG_SYS_R7780MP_OLD_FLASH
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/* NOR Flash (S29PL127J60TFI130) */
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# define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_32BIT
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# define CONFIG_SYS_MAX_FLASH_BANKS	(2)
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# define CONFIG_SYS_MAX_FLASH_SECT	270
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# define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE,\
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				CONFIG_SYS_FLASH_BASE + 0x100000,\
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				CONFIG_SYS_FLASH_BASE + 0x400000,\
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				CONFIG_SYS_FLASH_BASE + 0x700000, }
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#else /* CONFIG_SYS_R7780MP_OLD_FLASH */
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/* NOR Flash (Spantion S29GL256P) */
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# define CONFIG_SYS_MAX_FLASH_BANKS	(1)
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# define CONFIG_SYS_MAX_FLASH_SECT		256
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# define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
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#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
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#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
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/* Address of u-boot image in Flash */
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#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
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#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
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/* Size of DRAM reserved for malloc() use */
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#define CONFIG_SYS_MALLOC_LEN		(1204 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
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#define CONFIG_SYS_RX_ETH_BUFFER	(8)
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
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#undef  CONFIG_SYS_FLASH_QUIET_TEST
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/* print 'E' for empty sector on flinfo */
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_ENV_SECT_SIZE	(256 * 1024)
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#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_SYS_FLASH_ERASE_TOUT	120000
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#define CONFIG_SYS_FLASH_WRITE_TOUT	500
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ	33333333
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SYS_TMU_CLK_DIV		4
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/* PCI Controller */
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#if defined(CONFIG_CMD_PCI)
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#define CONFIG_SH4_PCI
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#define CONFIG_SH7780_PCI
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#define CONFIG_SH7780_PCI_LSR	0x07f00001
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#define CONFIG_SH7780_PCI_LAR	CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_SH7780_PCI_BAR	CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_PCI_SCAN_SHOW	1
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#define __mem_pci
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#define CONFIG_PCI_MEM_BUS	0xFD000000	/* Memory space base addr */
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#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE	0x01000000	/* Size of Memory window */
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#define CONFIG_PCI_IO_BUS	0xFE200000	/* IO space base address */
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#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */
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#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
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#define CONFIG_PCI_SYS_BUS  CONFIG_SYS_SDRAM_BASE
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#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
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#endif /* CONFIG_CMD_PCI */
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#if defined(CONFIG_CMD_NET)
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/* AX88796L Support(NE2000 base chip) */
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#define CONFIG_DRIVER_AX88796L
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#define CONFIG_DRIVER_NE2000_BASE	0xA4100000
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#endif
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/* Compact flash Support */
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#if defined(CONFIG_IDE)
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#define CONFIG_IDE_RESET        1
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#define CONFIG_SYS_PIO_MODE            1
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#define CONFIG_SYS_IDE_MAXBUS          1   /* IDE bus */
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#define CONFIG_SYS_IDE_MAXDEVICE       1
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#define CONFIG_SYS_ATA_BASE_ADDR       0xb4000000
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#define CONFIG_SYS_ATA_STRIDE          2               /* 1bit shift */
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#define CONFIG_SYS_ATA_DATA_OFFSET     0x1000          /* data reg offset */
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#define CONFIG_SYS_ATA_REG_OFFSET      0x1000          /* reg offset */
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#define CONFIG_SYS_ATA_ALT_OFFSET      0x800           /* alternate register offset */
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#define CONFIG_IDE_SWAP_IO
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#endif /* CONFIG_IDE */
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#endif /* __R7780RP_H */
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