96 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			96 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
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 *
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 * SPDX-License-Identifier:     GPL-2.0+
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 */
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#ifndef __CONFIG_RK3308_COMMON_H
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#define __CONFIG_RK3308_COMMON_H
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#include "rockchip-common.h"
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#define CONFIG_SYS_MALLOC_LEN		(10 << 20)
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#define CONFIG_SYS_CBSIZE		1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_MAX_NAND_DEVICE	1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_PAGE_SIZE	2048
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#define CONFIG_SYS_NAND_PAGE_COUNT	64
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#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE		0x00000000
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#define CONFIG_SPL_MAX_SIZE		0x40000
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#define CONFIG_SPL_BSS_START_ADDR	0x00400000
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#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
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#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_TEXT_BASE		0x00600000
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#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
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#define CONFIG_SYS_LOAD_ADDR		0x00C00800
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#define CONFIG_SPL_STACK		0x00400000
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#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
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#define COUNTER_FREQUENCY		24000000
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#define GICD_BASE			0xff581000
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#define GICC_BASE			0xff582000
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#define OTP_SECURE_BOOT_ENABLE_ADDR	0x0
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#define OTP_SECURE_BOOT_ENABLE_SIZE	1
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#define OTP_RSA_HASH_ADDR		0x10
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#define OTP_RSA_HASH_SIZE		32
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#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_SYS_SDRAM_BASE		0
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#define SDRAM_MAX_SIZE			0xff000000
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#define SDRAM_BANK_SIZE			(2UL << 30)
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#ifdef CONFIG_DM_DVFS
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#define CONFIG_PREBOOT			"dvfs repeat"
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#else
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#define CONFIG_PREBOOT
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#endif
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
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#ifdef CONFIG_ARM64
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#define ENV_MEM_LAYOUT_SETTINGS \
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	"scriptaddr=0x00500000\0" \
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	"pxefile_addr_r=0x00600000\0" \
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	"fdt_addr_r=0x01f00000\0" \
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	"kernel_addr_no_low_bl32_r=0x00280000\0" \
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	"kernel_addr_r=0x00680000\0" \
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	"kernel_addr_c=0x02480000\0" \
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	"ramdisk_addr_r=0x04000000\0"
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#else
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#define ENV_MEM_LAYOUT_SETTINGS \
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	"scriptaddr=0x00500000\0" \
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	"pxefile_addr_r=0x00600000\0" \
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	"fdt_addr_r=0x02800000\0" \
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	"kernel_addr_r=0x00058000\0" \
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	"kernel_addr_c=0x2008000\0" \
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	"ramdisk_addr_r=0x02900000\0"
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#endif
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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	ENV_MEM_LAYOUT_SETTINGS \
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	"partitions=" PARTS_DEFAULT \
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	ROCKCHIP_DEVICE_SETTINGS \
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	RKIMG_DET_BOOTDEV \
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	BOOTENV_SHARED_RKNAND \
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	BOOTENV
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#endif
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#endif
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