99 lines
2.5 KiB
C
99 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*
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*/
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#ifndef __CONFIG_RK3588_COMMON_H
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#define __CONFIG_RK3588_COMMON_H
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#include "rockchip-common.h"
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x00000000
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#define CONFIG_SPL_MAX_SIZE 0x00040000
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#define CONFIG_SPL_BSS_START_ADDR 0x03fe0000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00010000
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#define CONFIG_SPL_STACK 0x03fe0000
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#ifdef CONFIG_SPL_LOAD_FIT_ADDRESS
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#undef CONFIG_SPL_LOAD_FIT_ADDRESS
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#endif
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#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#ifdef CONFIG_SUPPORT_USBPLUG
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x00200000
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#endif
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#define CONFIG_SYS_INIT_SP_ADDR 0x00600000
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#define CONFIG_SYS_LOAD_ADDR 0x00600800
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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#define COUNTER_FREQUENCY 24000000
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#define GICD_BASE 0xfe600000
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#define GICR_BASE 0xfe680000
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#define GICC_BASE 0xfe600000
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/* secure otp */
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#define OTP_UBOOT_ROLLBACK_OFFSET 0x150
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#define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */
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#define OTP_ALL_ONES_NUM_BITS 32
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#define OTP_SECURE_BOOT_ENABLE_ADDR 0x20
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#define OTP_SECURE_BOOT_ENABLE_SIZE 1
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#define OTP_RSA_HASH_ADDR 0x9c0
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#define OTP_RSA_HASH_SIZE 32
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xf0000000
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_ROCKUSB_G_DNL_PID 0x350b
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#define ROCKUSB_FSG_BUFLEN 0x400000
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/*
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* decompressed kernel: 4M ~ 84M
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* Why not start from 2M ? if kernel < 5.10 in Android image,
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* the image header will use the 0x180000~0x200000, which is
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* overlap with share memory region 0x100000~0x200000.
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*
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* compressed kernel: 84M ~ 130M
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*/
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00500000\0" \
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"pxefile_addr_r=0x00600000\0" \
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"fdt_addr_r=0x08300000\0" \
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"kernel_addr_r=0x00400000\0" \
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"kernel_addr_c=0x05480000\0" \
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"ramdisk_addr_r=0x0a200000\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV_SHARED_MTD \
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ENV_MEM_LAYOUT_SETTINGS \
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"partitions=" PARTS_RKIMG \
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ROCKCHIP_DEVICE_SETTINGS \
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RKIMG_DET_BOOTDEV \
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BOOTENV
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#endif
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/* rockchip ohci host driver */
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#define CONFIG_PREBOOT
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#define CONFIG_LIB_HW_RAND
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#endif
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