117 lines
2.9 KiB
C
117 lines
2.9 KiB
C
/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RV1106_COMMON_H
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#define __CONFIG_RV1106_COMMON_H
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#define CFG_CPUID_OFFSET 0xa
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#include "rockchip-common.h"
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_MALLOC_LEN (16 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_NS16550_MEM32
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#ifdef CONFIG_SUPPORT_USBPLUG
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x00200000
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#endif
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#define CONFIG_SYS_INIT_SP_ADDR 0x00400000
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#define CONFIG_SYS_LOAD_ADDR 0x00e00800
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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#define GICD_BASE 0xff1f1000
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#define GICC_BASE 0xff1f2000
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xff000000
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
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#define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
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#define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x00000000
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#define CONFIG_SPL_MAX_SIZE 0x28000
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#define CONFIG_SPL_BSS_START_ADDR 0x001fe000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
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#define CONFIG_SPL_STACK 0x001fe000
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/* secure otp */
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#define OTP_UBOOT_ROLLBACK_OFFSET 0xe0
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#define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */
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#define OTP_ALL_ONES_NUM_BITS 32
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#define OTP_SECURE_BOOT_ENABLE_ADDR 0x80
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#define OTP_SECURE_BOOT_ENABLE_SIZE 2
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#define OTP_RSA_HASH_ADDR 0x90
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#define OTP_RSA_HASH_SIZE 32
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_ROCKUSB_G_DNL_PID 0x110c
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#define CONFIG_LIB_HW_RAND
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#define CONFIG_PREBOOT
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#if CONFIG_USB_FUNCTION_DFU
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#define CONFIG_SET_DFU_ALT_INFO
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#endif
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#ifdef CONFIG_ENV_MEM_LAYOUT
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#define ENV_MEM_LAYOUT_SETTINGS CONFIG_ENV_MEM_LAYOUT_SETTINGS
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#else
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/*
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* Image: 0 - 8M
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* zImage: 8 - 12M
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* fdt: 12 - 13M
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* ramdisk: 14 ...
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*/
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00b00000\0" \
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"pxefile_addr_r=0x00c00000\0" \
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"fdt_addr_r=0x00c00000\0" \
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"kernel_addr_c=0x00808000\0" \
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"kernel_addr_r=0x00008000\0" \
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"ramdisk_addr_r=0x000e00000\0"
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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ROCKCHIP_DEVICE_SETTINGS \
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RKIMG_DET_BOOTDEV
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#undef RKIMG_BOOTCOMMAND
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#ifdef CONFIG_FIT_SIGNATURE
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#define RKIMG_BOOTCOMMAND \
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"boot_fit;"
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#else
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#define RKIMG_BOOTCOMMAND \
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"boot_fit;" \
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"boot_android ${devtype} ${devnum};"
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#endif
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/* Update define for tiny image */
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#ifdef CONFIG_ROCKCHIP_IMAGE_TINY
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#undef RKIMG_BOOTCOMMAND
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#undef RKIMG_DET_BOOTDEV
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#undef CONFIG_AUTO_COMPLETE
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#undef CONFIG_SYS_LONGHELP
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#undef CONFIG_ZLIB
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#undef CONFIG_GZIP
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/* TODO: #define CONFIG_LIB_HW_RAND */
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#define RKIMG_BOOTCOMMAND "boot_fit;"
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#define CONFIG_EXTRA_ENV_SETTINGS ENV_MEM_LAYOUT_SETTINGS
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#endif
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#endif /* !CONFIG_SPL_BUILD */
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#endif
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