112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RV1126_COMMON_H
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#define __CONFIG_RV1126_COMMON_H
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#include "rockchip-common.h"
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_NS16550_MEM32
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#ifdef CONFIG_SUPPORT_USBPLUG
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#define CONFIG_SYS_TEXT_BASE 0x00000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x00600000
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#endif
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#define CONFIG_SYS_INIT_SP_ADDR 0x00800000
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#define CONFIG_SYS_LOAD_ADDR 0x00e00800
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x00000000
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#define CONFIG_SPL_MAX_SIZE 0x30000
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#define CONFIG_SPL_BSS_START_ADDR 0x00600000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
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#define CONFIG_SPL_STACK 0x00600000
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#define GICD_BASE 0xfeff1000
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#define GICC_BASE 0xfeff2000
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/* secure boot otp rollback */
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#define OTP_UBOOT_ROLLBACK_OFFSET 0x68
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#define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */
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#define OTP_ALL_ONES_NUM_BITS 32
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#define OTP_SECURE_BOOT_ENABLE_ADDR 0x0
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#define OTP_SECURE_BOOT_ENABLE_SIZE 1
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#define OTP_RSA_HASH_ADDR 0x10
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#define OTP_RSA_HASH_SIZE 32
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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/* Nand */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xfd000000
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#define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE)
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#define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_ROCKUSB_G_DNL_PID 0x110b
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/* memory size <= 128MB, TEE: 0x3000000 - 0x3200000 */
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#define ENV_MEM_LAYOUT_SETTINGS1 \
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"scriptaddr1=0x00000000\0" \
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"pxefile_addr1_r=0x00100000\0" \
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"fdt_addr1_r=0x02f00000\0" \
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"kernel_addr1_r=0x02008000\0" \
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"ramdisk_addr1_r=0x03200000\0"
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/* memory size > 128MB */
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00000000\0" \
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"pxefile_addr_r=0x00100000\0" \
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"fdt_addr_r=0x08300000\0" \
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"kernel_addr_r=0x02008000\0" \
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"ramdisk_addr_r=0x0a200000\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS1 \
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"partitions=" PARTS_DEFAULT \
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ROCKCHIP_DEVICE_SETTINGS \
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RKIMG_DET_BOOTDEV \
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BOOTENV_SHARED_RKNAND \
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BOOTENV
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#undef RKIMG_BOOTCOMMAND
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#ifdef CONFIG_FIT_SIGNATURE
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#define RKIMG_BOOTCOMMAND \
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"boot_fit;"
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#else
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#define RKIMG_BOOTCOMMAND \
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"boot_fit;" \
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"boot_android ${devtype} ${devnum};"
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#endif
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#endif
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#define CONFIG_LIB_HW_RAND
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#define CONFIG_PREBOOT
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#endif
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