215 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			215 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * Copyright 2013 Freescale Semiconductor, Inc.
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 *
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 * Configuration settings for the Freescale Vybrid vf610twr board.
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_MACH_TYPE		4146
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Enable passing of ATAGs */
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#define CONFIG_CMDLINE_TAG
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* NAND support */
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE	1
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#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
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/* Dynamic MTD partition support */
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#endif
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR	0
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#define CONFIG_SYS_FSL_ESDHC_NUM	1
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE			ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE		RMII
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#define CONFIG_FEC_MXC_PHYADDR          0
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/* QSPI Configs*/
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#ifdef CONFIG_FSL_QSPI
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#define FSL_QSPI_FLASH_SIZE		(1 << 24)
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#define FSL_QSPI_FLASH_NUM		2
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#define CONFIG_SYS_FSL_QSPI_LE
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
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#define CONFIG_SYS_SPD_BUS_NUM		0
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#define CONFIG_SYS_LOAD_ADDR		0x82000000
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/* We boot from the gfxRAM area of the OCRAM. */
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#define CONFIG_SYS_TEXT_BASE		0x3f408000
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#define CONFIG_BOARD_SIZE_LIMIT		524288
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/*
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 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
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 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
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 * DDR3. Hence, limit the memory range for image processing to 112MB
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 * using bootm_size. All of the following must be within this range.
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 * We have the default load at 32MB into DDR (for the kernel), FDT at
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 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
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 * seen large trees). This allows a reasonable split between ramdisk
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 * and kernel size, where the ram disk can be a bit larger.
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 */
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#define MEM_LAYOUT_ENV_SETTINGS \
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	"bootm_size=0x07000000\0" \
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	"loadaddr=0x82000000\0" \
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	"kernel_addr_r=0x82000000\0" \
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	"fdt_addr=0x84000000\0" \
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	"fdt_addr_r=0x84000000\0" \
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	"rdaddr=0x84080000\0" \
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	"ramdisk_addr_r=0x84080000\0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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	MEM_LAYOUT_ENV_SETTINGS \
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	"script=boot.scr\0" \
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	"image=zImage\0" \
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	"console=ttyLP1\0" \
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	"fdt_file=vf610-twr.dtb\0" \
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	"boot_fdt=try\0" \
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	"ip_dyn=yes\0" \
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	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
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	"mmcpart=1\0" \
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	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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	"update_sd_firmware_filename=u-boot.imx\0" \
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	"update_sd_firmware=" \
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		"if test ${ip_dyn} = yes; then " \
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			"setenv get_cmd dhcp; " \
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		"else " \
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			"setenv get_cmd tftp; " \
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		"fi; " \
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		"if mmc dev ${mmcdev}; then "	\
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			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
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				"setexpr fw_sz ${filesize} / 0x200; " \
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				"setexpr fw_sz ${fw_sz} + 1; "	\
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				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
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			"fi; "	\
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		"fi\0" \
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	"mmcargs=setenv bootargs console=${console},${baudrate} " \
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		"root=${mmcroot}\0" \
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	"loadbootscript=" \
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		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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	"bootscript=echo Running bootscript from mmc ...; " \
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		"source\0" \
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	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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	"mmcboot=echo Booting from mmc ...; " \
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		"run mmcargs; " \
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		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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			"if run loadfdt; then " \
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				"bootz ${loadaddr} - ${fdt_addr}; " \
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			"else " \
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				"if test ${boot_fdt} = try; then " \
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					"bootz; " \
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				"else " \
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					"echo WARN: Cannot load the DT; " \
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				"fi; " \
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			"fi; " \
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		"else " \
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			"bootz; " \
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		"fi;\0" \
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	"netargs=setenv bootargs console=${console},${baudrate} " \
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		"root=/dev/nfs " \
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	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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		"netboot=echo Booting from net ...; " \
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		"run netargs; " \
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		"if test ${ip_dyn} = yes; then " \
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			"setenv get_cmd dhcp; " \
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		"else " \
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			"setenv get_cmd tftp; " \
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		"fi; " \
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		"${get_cmd} ${image}; " \
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		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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				"bootz ${loadaddr} - ${fdt_addr}; " \
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			"else " \
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				"if test ${boot_fdt} = try; then " \
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					"bootz; " \
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				"else " \
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					"echo WARN: Cannot load the DT; " \
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				"fi; " \
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			"fi; " \
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		"else " \
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			"bootz; " \
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		"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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	   "mmc dev ${mmcdev}; if mmc rescan; then " \
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		   "if run loadbootscript; then " \
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			   "run bootscript; " \
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		   "else " \
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			   "if run loadimage; then " \
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				   "run mmcboot; " \
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			   "else run netboot; " \
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			   "fi; " \
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		   "fi; " \
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	   "else run netboot; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP		/* undef to save memory */
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#undef CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_MEMTEST_START	0x80010000
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#define CONFIG_SYS_MEMTEST_END		0x87C00000
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/* Physical memory map */
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#define CONFIG_NR_DRAM_BANKS		1
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#define PHYS_SDRAM			(0x80000000)
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#define PHYS_SDRAM_SIZE			(128 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#ifdef CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_SIZE			(8 * 1024)
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#define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV		0
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#endif
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#ifdef CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE			(64 * 2048)
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#define CONFIG_ENV_SECT_SIZE		(64 * 2048)
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#define CONFIG_ENV_RANGE		(512 * 1024)
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#define CONFIG_ENV_OFFSET		0x180000
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#endif
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#endif
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