97 lines
2.7 KiB
C
97 lines
2.7 KiB
C
/*
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <cdefs.h>
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#include <drivers/arm/smmu_v3.h>
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#include <drivers/delay_timer.h>
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#include <lib/mmio.h>
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/* SMMU poll number of retries */
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#define SMMU_POLL_TIMEOUT_US U(1000)
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static int __init smmuv3_poll(uintptr_t smmu_reg, uint32_t mask,
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uint32_t value)
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{
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uint32_t reg_val;
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uint64_t timeout;
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/* Set 1ms timeout value */
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timeout = timeout_init_us(SMMU_POLL_TIMEOUT_US);
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do {
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reg_val = mmio_read_32(smmu_reg);
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if ((reg_val & mask) == value)
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return 0;
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} while (!timeout_elapsed(timeout));
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ERROR("Timeout polling SMMUv3 register @%p\n", (void *)smmu_reg);
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ERROR("Read value 0x%x, expected 0x%x\n", reg_val,
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value == 0U ? reg_val & ~mask : reg_val | mask);
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return -1;
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}
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/*
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* Abort all incoming transactions in order to implement a default
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* deny policy on reset.
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*/
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int __init smmuv3_security_init(uintptr_t smmu_base)
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{
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/* Attribute update has completed when SMMU_(S)_GBPA.Update bit is 0 */
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if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U)
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return -1;
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/*
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* SMMU_(S)_CR0 resets to zero with all streams bypassing the SMMU,
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* so just abort all incoming transactions.
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*/
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mmio_setbits_32(smmu_base + SMMU_GBPA,
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SMMU_GBPA_UPDATE | SMMU_GBPA_ABORT);
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if (smmuv3_poll(smmu_base + SMMU_GBPA, SMMU_GBPA_UPDATE, 0U) != 0U)
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return -1;
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/* Check if the SMMU supports secure state */
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if ((mmio_read_32(smmu_base + SMMU_S_IDR1) &
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SMMU_S_IDR1_SECURE_IMPL) == 0U)
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return 0;
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/* Abort all incoming secure transactions */
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if (smmuv3_poll(smmu_base + SMMU_S_GBPA, SMMU_S_GBPA_UPDATE, 0U) != 0U)
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return -1;
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mmio_setbits_32(smmu_base + SMMU_S_GBPA,
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SMMU_S_GBPA_UPDATE | SMMU_S_GBPA_ABORT);
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return smmuv3_poll(smmu_base + SMMU_S_GBPA, SMMU_S_GBPA_UPDATE, 0U);
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}
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/*
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* Initialize the SMMU by invalidating all secure caches and TLBs.
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* Abort all incoming transactions in order to implement a default
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* deny policy on reset
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*/
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int __init smmuv3_init(uintptr_t smmu_base)
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{
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/* Abort all incoming transactions */
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if (smmuv3_security_init(smmu_base) != 0)
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return -1;
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/* Check if the SMMU supports secure state */
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if ((mmio_read_32(smmu_base + SMMU_S_IDR1) &
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SMMU_S_IDR1_SECURE_IMPL) == 0U)
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return 0;
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/*
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* Initiate invalidation of secure caches and TLBs if the SMMU
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* supports secure state. If not, it's implementation defined
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* as to how SMMU_S_INIT register is accessed.
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*/
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mmio_write_32(smmu_base + SMMU_S_INIT, SMMU_S_INIT_INV_ALL);
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/* Wait for global invalidation operation to finish */
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return smmuv3_poll(smmu_base + SMMU_S_INIT,
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SMMU_S_INIT_INV_ALL, 0U);
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}
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