395 lines
8.2 KiB
C
395 lines
8.2 KiB
C
/*
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* Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <libfdt.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <drivers/st/stm32_i2c.h>
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#include <drivers/st/stm32mp_pmic.h>
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#include <drivers/st/stpmic1.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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#define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
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#define STPMIC1_LDO12356_OUTPUT_SHIFT 2
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#define STPMIC1_LDO3_MODE (uint8_t)(BIT(7))
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#define STPMIC1_LDO3_DDR_SEL 31U
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#define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT)
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#define STPMIC1_BUCK_OUTPUT_SHIFT 2
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#define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT)
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#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1
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static struct i2c_handle_s i2c_handle;
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static uint32_t pmic_i2c_addr;
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static int dt_get_pmic_node(void *fdt)
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{
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return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
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}
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int dt_pmic_status(void)
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{
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int node;
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void *fdt;
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if (fdt_get_address(&fdt) == 0) {
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return -ENOENT;
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}
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node = dt_get_pmic_node(fdt);
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if (node <= 0) {
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return -FDT_ERR_NOTFOUND;
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}
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return fdt_get_status(node);
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}
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static bool dt_pmic_is_secure(void)
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{
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int status = dt_pmic_status();
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return (status >= 0) &&
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(status == DT_SECURE) &&
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(i2c_handle.dt_status == DT_SECURE);
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}
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/*
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* Get PMIC and its I2C bus configuration from the device tree.
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* Return 0 on success, negative on error, 1 if no PMIC node is found.
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*/
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static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
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struct stm32_i2c_init_s *init)
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{
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int pmic_node, i2c_node;
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void *fdt;
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const fdt32_t *cuint;
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if (fdt_get_address(&fdt) == 0) {
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return -ENOENT;
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}
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pmic_node = dt_get_pmic_node(fdt);
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if (pmic_node < 0) {
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return 1;
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}
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cuint = fdt_getprop(fdt, pmic_node, "reg", NULL);
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if (cuint == NULL) {
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return -FDT_ERR_NOTFOUND;
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}
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pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1;
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if (pmic_i2c_addr > UINT16_MAX) {
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return -EINVAL;
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}
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i2c_node = fdt_parent_offset(fdt, pmic_node);
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if (i2c_node < 0) {
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return -FDT_ERR_NOTFOUND;
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}
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dt_fill_device_info(i2c_info, i2c_node);
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if (i2c_info->base == 0U) {
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return -FDT_ERR_NOTFOUND;
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}
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return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init);
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}
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int dt_pmic_configure_boot_on_regulators(void)
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{
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int pmic_node, regulators_node, regulator_node;
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void *fdt;
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if (fdt_get_address(&fdt) == 0) {
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return -ENOENT;
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}
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pmic_node = dt_get_pmic_node(fdt);
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if (pmic_node < 0) {
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return -FDT_ERR_NOTFOUND;
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}
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regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators");
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if (regulators_node < 0) {
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return -ENOENT;
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}
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fdt_for_each_subnode(regulator_node, fdt, regulators_node) {
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const fdt32_t *cuint;
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const char *node_name = fdt_get_name(fdt, regulator_node, NULL);
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uint16_t voltage;
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int status;
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#if defined(IMAGE_BL2)
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if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on",
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NULL) == NULL) &&
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(fdt_getprop(fdt, regulator_node, "regulator-always-on",
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NULL) == NULL)) {
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#else
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if (fdt_getprop(fdt, regulator_node, "regulator-boot-on",
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NULL) == NULL) {
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#endif
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continue;
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}
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if (fdt_getprop(fdt, regulator_node, "regulator-pull-down",
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NULL) != NULL) {
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status = stpmic1_regulator_pull_down_set(node_name);
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if (status != 0) {
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return status;
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}
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}
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if (fdt_getprop(fdt, regulator_node, "st,mask-reset",
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NULL) != NULL) {
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status = stpmic1_regulator_mask_reset_set(node_name);
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if (status != 0) {
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return status;
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}
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}
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cuint = fdt_getprop(fdt, regulator_node,
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"regulator-min-microvolt", NULL);
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if (cuint == NULL) {
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continue;
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}
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/* DT uses microvolts, whereas driver awaits millivolts */
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voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U);
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status = stpmic1_regulator_voltage_set(node_name, voltage);
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if (status != 0) {
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return status;
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}
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if (stpmic1_is_regulator_enabled(node_name) == 0U) {
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status = stpmic1_regulator_enable(node_name);
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if (status != 0) {
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return status;
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}
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}
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}
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return 0;
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}
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bool initialize_pmic_i2c(void)
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{
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int ret;
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struct dt_node_info i2c_info;
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struct i2c_handle_s *i2c = &i2c_handle;
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struct stm32_i2c_init_s i2c_init;
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ret = dt_pmic_i2c_config(&i2c_info, &i2c_init);
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if (ret < 0) {
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ERROR("I2C configuration failed %d\n", ret);
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panic();
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}
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if (ret != 0) {
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return false;
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}
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/* Initialize PMIC I2C */
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i2c->i2c_base_addr = i2c_info.base;
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i2c->dt_status = i2c_info.status;
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i2c->clock = i2c_info.clock;
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i2c->i2c_state = I2C_STATE_RESET;
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i2c_init.own_address1 = pmic_i2c_addr;
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i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT;
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i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE;
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i2c_init.own_address2 = 0;
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i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK;
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i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE;
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i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE;
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i2c_init.analog_filter = 1;
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i2c_init.digital_filter_coef = 0;
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ret = stm32_i2c_init(i2c, &i2c_init);
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if (ret != 0) {
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ERROR("Cannot initialize I2C %x (%d)\n",
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i2c->i2c_base_addr, ret);
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panic();
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}
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if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1,
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I2C_TIMEOUT_BUSY_MS)) {
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ERROR("I2C device not ready\n");
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panic();
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}
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stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr);
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return true;
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}
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static void register_pmic_shared_peripherals(void)
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{
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uintptr_t i2c_base = i2c_handle.i2c_base_addr;
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if (dt_pmic_is_secure()) {
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stm32mp_register_secure_periph_iomem(i2c_base);
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} else {
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if (i2c_base != 0U) {
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stm32mp_register_non_secure_periph_iomem(i2c_base);
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}
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}
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}
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void initialize_pmic(void)
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{
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unsigned long pmic_version;
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if (!initialize_pmic_i2c()) {
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VERBOSE("No PMIC\n");
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return;
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}
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register_pmic_shared_peripherals();
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if (stpmic1_get_version(&pmic_version) != 0) {
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ERROR("Failed to access PMIC\n");
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panic();
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}
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INFO("PMIC version = 0x%02lx\n", pmic_version);
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stpmic1_dump_regulators();
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#if defined(IMAGE_BL2)
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if (dt_pmic_configure_boot_on_regulators() != 0) {
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panic();
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};
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#endif
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}
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int pmic_ddr_power_init(enum ddr_type ddr_type)
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{
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bool buck3_at_1v8 = false;
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uint8_t read_val;
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int status;
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switch (ddr_type) {
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case STM32MP_DDR3:
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/* Set LDO3 to sync mode */
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status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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read_val &= ~STPMIC1_LDO3_MODE;
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read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
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read_val |= STPMIC1_LDO3_DDR_SEL <<
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STPMIC1_LDO12356_OUTPUT_SHIFT;
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status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
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if (status != 0) {
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return status;
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}
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status = stpmic1_regulator_voltage_set("buck2", 1350);
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if (status != 0) {
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return status;
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}
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status = stpmic1_regulator_enable("buck2");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmic1_regulator_enable("vref_ddr");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmic1_regulator_enable("ldo3");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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break;
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case STM32MP_LPDDR2:
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case STM32MP_LPDDR3:
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/*
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* Set LDO3 to 1.8V
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* Set LDO3 to bypass mode if BUCK3 = 1.8V
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* Set LDO3 to normal mode if BUCK3 != 1.8V
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*/
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status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) {
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buck3_at_1v8 = true;
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}
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status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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read_val &= ~STPMIC1_LDO3_MODE;
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read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
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read_val |= STPMIC1_LDO3_1800000;
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if (buck3_at_1v8) {
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read_val |= STPMIC1_LDO3_MODE;
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}
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status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
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if (status != 0) {
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return status;
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}
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status = stpmic1_regulator_voltage_set("buck2", 1200);
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if (status != 0) {
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return status;
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}
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status = stpmic1_regulator_enable("ldo3");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmic1_regulator_enable("buck2");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmic1_regulator_enable("vref_ddr");
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if (status != 0) {
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return status;
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}
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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break;
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default:
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break;
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};
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return 0;
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}
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