31 lines
725 B
C
31 lines
725 B
C
/*
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* Copyright 2021 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef QSPI_H
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#define QSPI_H
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#include <endian.h>
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#include <lib/mmio.h>
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#define CHS_QSPI_MCR 0x01550000
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#define CHS_QSPI_64LE 0xC
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#ifdef NXP_QSPI_BE
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#define qspi_in32(a) bswap32(mmio_read_32((uintptr_t)(a)))
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#define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v))
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#elif defined(NXP_QSPI_LE)
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#define qspi_in32(a) mmio_read_32((uintptr_t)(a))
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#define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), (v))
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#else
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#error Please define CCSR QSPI register endianness
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#endif
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int qspi_io_setup(uintptr_t nxp_qspi_flash_addr,
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size_t nxp_qspi_flash_size,
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uintptr_t fip_offset);
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#endif /* __QSPI_H__ */
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