362 lines
8.0 KiB
Plaintext
362 lines
8.0 KiB
Plaintext
/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/rockchip-system-status.h>
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#include "rk3288-dram-default-timing.dtsi"
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#include <dt-bindings/display/media-bus-format.h>
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/ {
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M";
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};
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cpuinfo {
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compatible = "rockchip,cpuinfo";
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nvmem-cells = <&efuse_id>;
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nvmem-cell-names = "id";
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};
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/delete-node/ dmc@ff610000;
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dfi: dfi {
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compatible = "rockchip,rk3288-dfi";
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rockchip,pmu = <&pmu>;
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rockchip,grf = <&grf>;
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status = "disabled";
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};
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dmc: dmc {
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compatible = "rockchip,rk3288-dmc";
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devfreq-events = <&dfi>;
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clocks = <&cru SCLK_DDRCLK>, <&cru PCLK_PUBL0>,
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<&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL1>,
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<&cru PCLK_DDRUPCTL1>;
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clock-names = "dmc_clk", "pclk_phy0", "pclk_upctl0",
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"pclk_phy1", "pclk_upctl1";
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upthreshold = <55>;
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downdifferential = <10>;
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operating-points-v2 = <&dmc_opp_table>;
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vop-dclk-mode = <0>;
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min-cpu-freq = <600000>;
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rockchip,ddr_timing = <&ddr_timing>;
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system-status-freq = <
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/*system status freq(KHz)*/
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SYS_STATUS_NORMAL 396000
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SYS_STATUS_REBOOT 396000
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SYS_STATUS_SUSPEND 192000
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SYS_STATUS_VIDEO_1080P 300000
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SYS_STATUS_VIDEO_4K 528000
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SYS_STATUS_VIDEO_4K_10B 528000
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SYS_STATUS_PERFORMANCE 528000
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SYS_STATUS_BOOST 396000
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SYS_STATUS_DUALVIEW 528000
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SYS_STATUS_ISP 528000
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>;
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auto-min-freq = <396000>;
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auto-freq-en = <0>;
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status = "diasbled";
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};
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dmc_opp_table: opp_table2 {
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compatible = "operating-points-v2";
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opp-192000000 {
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opp-hz = /bits/ 64 <192000000>;
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opp-microvolt = <1100000>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <1100000>;
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};
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opp-396000000 {
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opp-hz = /bits/ 64 <396000000>;
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opp-microvolt = <1100000>;
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};
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opp-528000000 {
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opp-hz = /bits/ 64 <528000000>;
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opp-microvolt = <1150000>;
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};
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};
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reserved-memory {
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ramoops: ramoops@8000000 {
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compatible = "ramoops";
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reg = <0x0 0x8000000 0x0 0xF0000>;
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record-size = <0x20000>;
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console-size = <0x80000>;
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ftrace-size = <0x00000>;
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pmsg-size = <0x50000>;
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};
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0 0x0 0x0>;
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};
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_xfer>;
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};
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firmware {
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optee: optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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/delete-node/ timer@ff810000;
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display-subsystem {
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status = "okay";
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ports = <&vopb_out>, <&vopl_out>;
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logo-memory-region = <&drm_logo>;
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route {
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route_edp: route-edp {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopl_out_edp>;
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};
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route_dsi0: route-dsi0 {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopl_out_dsi0>;
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};
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route_lvds: route-lvds {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopl_out_lvds>;
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};
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route_hdmi: route-hdmi {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopb_out_hdmi>;
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};
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route_rgb: route-rgb {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vopl_out_rgb>;
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};
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};
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};
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nandc0: nandc@ff400000 {
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compatible = "rockchip,rk-nandc";
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reg = <0x0 0xff400000 0x0 0x4000>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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nandc_id = <0>;
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clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
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clock-names = "clk_nandc", "hclk_nandc";
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status = "okay";
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};
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hdmi_analog_sound: hdmi-analog-sound {
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status = "disabled";
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compatible = "rockchip,rk3288-hdmi-analog",
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"rockchip,rk3368-hdmi-analog";
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rockchip,model = "rockchip,rt5640-codec";
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rockchip,cpu = <&i2s>;
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//rockchip,codec = <&rt5640>, <&hdmi>;
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rockchip,codec = <&hdmi>;
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rockchip,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack";
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rockchip,routing =
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"MIC1", "Microphone Jack",
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"MIC2", "Microphone Jack",
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"Microphone Jack", "micbias1",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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};
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};
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&dmac_bus_s {
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/* change to non-secure dmac */
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reg = <0x0 0xff600000 0x0 0x4000>;
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};
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&dsi0 {
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panel@0 {
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reg = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi: endpoint {
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remote-endpoint = <&dsi_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi>;
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};
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};
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};
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};
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&efuse {
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compatible = "rockchip,rk3288-secure-efuse";
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};
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&iep {
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status = "okay";
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};
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&iep_mmu {
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status = "okay";
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};
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&dsi0_in_vopb {
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status = "disabled";
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};
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&edp_in_vopb {
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status = "disabled";
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};
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&hdmi_in_vopl {
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status = "disabled";
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};
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&mpp_srv {
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status = "okay";
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};
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&hevc {
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status = "okay";
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};
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&hevc_mmu {
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status = "okay";
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};
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&rga {
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compatible = "rockchip,rga2";
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clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
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clock-names = "aclk_rga", "hclk_rga", "clk_rga";
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assigned-clocks = <&cru ACLK_RGA>, <&cru SCLK_RGA>;
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assigned-clock-rates = <300000000>, <300000000>;
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status = "okay";
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};
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&rng {
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status = "okay";
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};
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&uart2 {
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status = "disabled";
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};
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&pinctrl {
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buttons {
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pwrbtn: pwrbtn {
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rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&vdpu {
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status = "okay";
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};
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&vepu {
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status = "okay";
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};
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&vopb {
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support-multi-area;
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};
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&vopl {
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support-multi-area;
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};
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&video_phy {
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status = "okay";
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};
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&vpu_mmu {
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status = "okay";
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};
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