1364 lines
26 KiB
Plaintext
1364 lines
26 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/input/input.h>
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/ {
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 0>;
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io-channel-names = "buttons";
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poll-interval = <100>;
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keyup-threshold-microvolt = <1800000>;
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esc-key {
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label = "esc";
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linux,code = <KEY_ESC>;
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press-threshold-microvolt = <0>;
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};
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right-key {
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label = "right";
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linux,code = <KEY_RIGHT>;
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press-threshold-microvolt = <400781>;
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};
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left-key {
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label = "left";
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linux,code = <KEY_LEFT>;
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press-threshold-microvolt = <801562>;
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};
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menu-key {
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label = "menu";
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linux,code = <KEY_MENU>;
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press-threshold-microvolt = <1198828>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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cam_ircut0: cam_ircut {
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status = "okay";
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compatible = "rockchip,ircut";
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ircut-open-gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>;
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ircut-close-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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};
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dummy_codec: dummy-codec {
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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};
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pdm_mic_array: pdm-mic_array {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,pdm-mic-array";
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simple-audio-card,cpu {
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sound-dai = <&pdm>;
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};
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simple-audio-card,codec {
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sound-dai = <&dummy_codec>;
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};
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};
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rk809_sound: rk809-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk809-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809_codec>;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
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};
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vcc18_lcd_n: vcc18-lcd-n {
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compatible = "regulator-fixed";
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regulator-name = "vcc18_lcd_n";
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gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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vcc5v0_sys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vdd_npu: vdd-npu {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_npu";
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regulator-min-microvolt = <650000>;
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regulator-max-microvolt = <950000>;
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regulator-init-microvolt = <800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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vdd_vepu: vdd-vepu {
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 5000 1>;
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regulator-name = "vdd_vepu";
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regulator-min-microvolt = <650000>;
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regulator-max-microvolt = <950000>;
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regulator-init-microvolt = <800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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uart_rts_gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart0_rtsn>;
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pinctrl-1 = <&uart0_rtsn_gpio>;
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BT,power_gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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clocks = <&rk809 1>;
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clock-names = "clk_wifi";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_wake_host>;
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wifi_chip_type = "ap6255";
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/* WIFI,poweren_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; */
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WIFI,host_wake_irq = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu_tsadc {
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status = "okay";
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};
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&display_subsystem {
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status = "okay";
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};
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&dsi {
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status = "okay";
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rockchip,lane-rate = <480>;
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panel@0 {
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compatible = "ilitek,ili9881d", "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight>;
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power-supply = <&vcc18_lcd_n>;
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prepare-delay-ms = <5>;
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reset-delay-ms = <1>;
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init-delay-ms = <80>;
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disable-delay-ms = <10>;
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unprepare-delay-ms = <5>;
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width-mm = <68>;
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height-mm = <121>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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39 00 04 ff 98 81 03
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15 00 02 01 00
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15 00 02 02 00
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15 00 02 03 53
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15 00 02 04 53
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15 00 02 05 13
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15 00 02 06 04
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15 00 02 07 02
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15 00 02 08 02
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15 00 02 09 00
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15 00 02 0a 00
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15 00 02 0b 00
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15 00 02 0c 00
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15 00 02 0d 00
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15 00 02 0e 00
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15 00 02 0f 00
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15 00 02 10 00
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15 00 02 11 00
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15 00 02 12 00
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15 00 02 13 00
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15 00 02 14 00
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15 00 02 15 08
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15 00 02 16 10
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15 00 02 17 00
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15 00 02 18 08
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15 00 02 19 00
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15 00 02 1a 00
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15 00 02 1b 00
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15 00 02 1c 00
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15 00 02 1d 00
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15 00 02 1e c0
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15 00 02 1f 80
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15 00 02 20 02
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15 00 02 21 09
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15 00 02 22 00
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15 00 02 23 00
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15 00 02 24 00
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15 00 02 25 00
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15 00 02 26 00
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15 00 02 27 00
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15 00 02 28 55
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15 00 02 29 03
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15 00 02 2a 00
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15 00 02 2b 00
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15 00 02 2c 00
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15 00 02 2d 00
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15 00 02 2e 00
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15 00 02 2f 00
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15 00 02 30 00
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15 00 02 31 00
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15 00 02 32 00
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15 00 02 33 00
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15 00 02 34 04
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15 00 02 35 05
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15 00 02 36 05
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15 00 02 37 00
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15 00 02 38 3c
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15 00 02 39 35
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15 00 02 3a 00
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15 00 02 3b 40
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15 00 02 3c 00
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15 00 02 3d 00
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15 00 02 3e 00
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15 00 02 3f 00
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15 00 02 40 00
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15 00 02 41 88
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15 00 02 42 00
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15 00 02 43 00
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15 00 02 44 1f
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15 00 02 50 01
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15 00 02 51 23
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15 00 02 52 45
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15 00 02 53 67
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15 00 02 54 89
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15 00 02 55 ab
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15 00 02 56 01
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15 00 02 57 23
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15 00 02 58 45
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15 00 02 59 67
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15 00 02 5a 89
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15 00 02 5b ab
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15 00 02 5c cd
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15 00 02 5d ef
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15 00 02 5e 03
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15 00 02 5f 14
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15 00 02 60 15
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15 00 02 61 0c
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15 00 02 62 0d
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15 00 02 63 0e
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15 00 02 64 0f
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15 00 02 65 10
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15 00 02 66 11
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15 00 02 67 08
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15 00 02 68 02
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15 00 02 69 0a
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15 00 02 6a 02
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15 00 02 6b 02
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15 00 02 6c 02
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15 00 02 6d 02
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15 00 02 6e 02
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15 00 02 6f 02
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15 00 02 70 02
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15 00 02 71 02
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15 00 02 72 06
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15 00 02 73 02
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15 00 02 74 02
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15 00 02 75 14
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15 00 02 76 15
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15 00 02 77 0f
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15 00 02 78 0e
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15 00 02 79 0d
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15 00 02 7a 0c
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15 00 02 7b 11
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15 00 02 7c 10
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15 00 02 7d 06
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15 00 02 7e 02
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15 00 02 7f 0a
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15 00 02 80 02
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15 00 02 81 02
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15 00 02 82 02
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15 00 02 83 02
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15 00 02 84 02
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15 00 02 85 02
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15 00 02 86 02
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15 00 02 87 02
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15 00 02 88 08
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15 00 02 89 02
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15 00 02 8a 02
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39 00 04 ff 98 81 04
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15 00 02 00 80
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15 00 02 70 00
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15 00 02 71 00
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15 00 02 66 fe
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15 00 02 82 15
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15 00 02 84 15
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15 00 02 85 15
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15 00 02 3a 24
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15 00 02 32 ac
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15 00 02 8c 80
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15 00 02 3c f5
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15 00 02 88 33
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39 00 04 ff 98 81 01
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15 00 02 22 0a
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15 00 02 31 00
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15 00 02 53 78
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15 00 02 55 7b
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15 00 02 60 20
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15 00 02 61 00
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15 00 02 62 0d
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15 00 02 63 00
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15 00 02 a0 00
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15 00 02 a1 10
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15 00 02 a2 1c
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15 00 02 a3 13
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15 00 02 a4 15
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15 00 02 a5 26
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15 00 02 a6 1a
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15 00 02 a7 1d
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15 00 02 a8 67
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15 00 02 a9 1c
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15 00 02 aa 29
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15 00 02 ab 5b
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15 00 02 ac 26
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15 00 02 ad 28
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15 00 02 ae 5c
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15 00 02 af 30
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15 00 02 b0 31
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15 00 02 b1 32
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15 00 02 b2 00
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15 00 02 b1 2e
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15 00 02 b2 32
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15 00 02 b3 00
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15 00 02 c0 00
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15 00 02 c1 10
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15 00 02 c2 1c
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15 00 02 c3 13
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15 00 02 c4 15
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15 00 02 c5 26
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15 00 02 c6 1a
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15 00 02 c7 1d
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15 00 02 c8 67
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15 00 02 c9 1c
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15 00 02 ca 29
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15 00 02 cb 5b
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15 00 02 cc 26
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15 00 02 cd 28
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15 00 02 ce 5c
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15 00 02 cf 30
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15 00 02 d0 31
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15 00 02 d1 2e
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15 00 02 d2 32
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15 00 02 d3 00
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39 00 04 ff 98 81 00
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05 00 01 11
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05 01 01 29
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];
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <65000000>;
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hactive = <720>;
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vactive = <1280>;
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hfront-porch = <48>;
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hsync-len = <8>;
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hback-porch = <52>;
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vfront-porch = <16>;
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vsync-len = <6>;
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vback-porch = <15>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi: endpoint {
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remote-endpoint = <&dsi_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi>;
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};
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};
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};
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};
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&csi_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ucam_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&csi_dphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy1_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ucam_out1>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy1_output: endpoint@0 {
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reg = <0>;
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/*remote-endpoint = <&mipi_csi2_input>;*/
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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mmc-hs200-1_8v;
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rockchip,default-sample-phase = <90>;
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no-sdio;
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no-sd;
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/delete-property/ pinctrl-names;
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/delete-property/ pinctrl-0;
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status = "okay";
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};
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&fiq_debugger {
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status = "okay";
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};
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|
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&gmac {
|
|
phy-mode = "rgmii";
|
|
clock_in_out = "input";
|
|
|
|
snps,reset-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
|
|
snps,reset-active-low;
|
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
|
snps,reset-delays-us = <0 20000 100000>;
|
|
|
|
assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_ETHERNET_OUT>;
|
|
assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>;
|
|
assigned-clock-rates = <125000000>, <0>, <25000000>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmiim1_miim &rgmiim1_bus2 &rgmiim1_bus4 &clkm1_out_ethernet>;
|
|
|
|
tx_delay = <0x2a>;
|
|
rx_delay = <0x1a>;
|
|
|
|
phy-handle = <&phy>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
rk809: pmic@20 {
|
|
compatible = "rockchip,rk809";
|
|
reg = <0x20>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default", "pmic-sleep",
|
|
"pmic-power-off", "pmic-reset";
|
|
pinctrl-0 = <&pmic_int>;
|
|
pinctrl-1 = <&soc_slppin_gpio>, <&rk817_slppin_slp>;
|
|
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
|
pinctrl-3 = <&soc_slppin_slp>, <&rk817_slppin_rst>;
|
|
rockchip,system-power-controller;
|
|
wakeup-source;
|
|
#clock-cells = <1>;
|
|
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
|
/* 0: rst the pmic, 1: rst regs (default in codes) */
|
|
pmic-reset-func = <0>;
|
|
|
|
vcc1-supply = <&vcc5v0_sys>;
|
|
vcc2-supply = <&vcc5v0_sys>;
|
|
vcc3-supply = <&vcc5v0_sys>;
|
|
vcc4-supply = <&vcc5v0_sys>;
|
|
vcc5-supply = <&vcc_buck5>;
|
|
vcc6-supply = <&vcc_buck5>;
|
|
vcc7-supply = <&vcc5v0_sys>;
|
|
vcc8-supply = <&vcc3v3_sys>;
|
|
vcc9-supply = <&vcc5v0_sys>;
|
|
|
|
pwrkey {
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl_rk8xx: pinctrl_rk8xx {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
/omit-if-no-ref/
|
|
rk817_slppin_null: rk817_slppin_null {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
rk817_slppin_slp: rk817_slppin_slp {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
rk817_slppin_rst: rk817_slppin_rst {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun3";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vdd_logic: DCDC_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <725000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_logic";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <800000>;
|
|
};
|
|
};
|
|
|
|
vdd_arm: DCDC_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <725000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_arm";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_ddr: DCDC_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vcc_ddr";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc3v3_sys: DCDC_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vcc3v3_sys";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc_buck5: DCDC_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <2200000>;
|
|
regulator-max-microvolt = <2200000>;
|
|
regulator-name = "vcc_buck5";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <2200000>;
|
|
};
|
|
};
|
|
|
|
vcc_0v8: LDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <800000>;
|
|
regulator-name = "vcc_0v8";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc1v8_pmu: LDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc1v8_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd0v8_pmu: LDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <800000>;
|
|
regulator-name = "vcc0v8_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <800000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v8: LDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vcc_dovdd: LDO_REG5 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_dovdd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_dvdd: LDO_REG6 {
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-name = "vcc_dvdd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_avdd: LDO_REG7 {
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-name = "vcc_avdd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vccio_sd: LDO_REG8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vccio_sd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc3v3_sd: LDO_REG9 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc3v3_sd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc5v0_host: SWITCH_REG1 {
|
|
regulator-name = "vcc5v0_host";
|
|
};
|
|
|
|
vcc_3v3: SWITCH_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc_3v3";
|
|
};
|
|
};
|
|
|
|
rk809_codec: codec {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
|
clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
|
|
clock-names = "mclk";
|
|
pinctrl-names = "default";
|
|
assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
|
|
assigned-clock-parents = <&cru MCLK_I2S0_TX>;
|
|
pinctrl-0 = <&i2s0m0_mclk>;
|
|
hp-volume = <20>;
|
|
spk-volume = <3>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
ar0230: ar0230@10 {
|
|
compatible = "aptina,ar0230";
|
|
reg = <0x10>;
|
|
clocks = <&cru CLK_CIF_OUT>;
|
|
clock-names = "xvclk";
|
|
avdd-supply = <&vcc_avdd>;
|
|
dovdd-supply = <&vcc_dovdd>;
|
|
dvdd-supply = <&vcc_dvdd>;
|
|
power-domains = <&power RV1126_PD_VI>;
|
|
pwdn-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
|
|
/*reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;*/
|
|
rockchip,grf = <&grf>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&cifm0_dvp_ctl>;
|
|
rockchip,camera-module-index = <0>;
|
|
rockchip,camera-module-facing = "back";
|
|
rockchip,camera-module-name = "CMK-OT0836-PT2";
|
|
rockchip,camera-module-lens-name = "YT-2929";
|
|
port {
|
|
cam_para_out1: endpoint {
|
|
/* remote-endpoint = <&cif_para_in>; */
|
|
};
|
|
};
|
|
};
|
|
|
|
ov4689: ov4689@36 {
|
|
compatible = "ovti,ov4689";
|
|
reg = <0x36>;
|
|
clocks = <&cru CLK_MIPICSI_OUT>;
|
|
clock-names = "xvclk";
|
|
power-domains = <&power RV1126_PD_VI>;
|
|
pinctrl-names = "rockchip,camera_default";
|
|
pinctrl-0 = <&mipicsi_clk1>;
|
|
/*pinctrl-0 = <&mipicsi_clk0>;*/
|
|
avdd-supply = <&vcc_avdd>;
|
|
dovdd-supply = <&vcc_dovdd>;
|
|
dvdd-supply = <&vcc_dvdd>;
|
|
pwdn-gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
/*pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;*/
|
|
rockchip,camera-module-index = <1>;
|
|
rockchip,camera-module-facing = "front";
|
|
rockchip,camera-module-name = "JSD3425-C1";
|
|
rockchip,camera-module-lens-name = "JSD3425-C1";
|
|
/* NO_HDR:0 HDR_X2:5 HDR_X3:6 */
|
|
rockchip,camera-hdr-mode = <0>;
|
|
port {
|
|
ucam_out1: endpoint {
|
|
remote-endpoint = <&csi_dphy1_input>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
os04a10: os04a10@36 {
|
|
compatible = "ovti,os04a10";
|
|
reg = <0x36>;
|
|
clocks = <&cru CLK_MIPICSI_OUT>;
|
|
clock-names = "xvclk";
|
|
power-domains = <&power RV1126_PD_VI>;
|
|
pinctrl-names = "rockchip,camera_default";
|
|
pinctrl-0 = <&mipicsi_clk0>;
|
|
avdd-supply = <&vcc_avdd>;
|
|
dovdd-supply = <&vcc_dovdd>;
|
|
dvdd-supply = <&vcc_dvdd>;
|
|
pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
|
|
rockchip,camera-module-index = <1>;
|
|
rockchip,camera-module-facing = "front";
|
|
rockchip,camera-module-name = "CMK-OT1607-FV1";
|
|
rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16";
|
|
ir-cut = <&cam_ircut0>;
|
|
port {
|
|
ucam_out0: endpoint {
|
|
remote-endpoint = <&mipi_in_ucam0>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c5 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
gt1x: gt1x@14 {
|
|
compatible = "goodix,gt1x";
|
|
reg = <0x14>;
|
|
gtp_ics_slot_report;
|
|
power-supply = <&vcc18_lcd_n>;
|
|
goodix,rst-gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
goodix,irq-gpio = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
&i2s0_8ch {
|
|
status = "okay";
|
|
#sound-dai-cells = <0>;
|
|
rockchip,clk-trcm = <1>;
|
|
rockchip,i2s-rx-route = <3 1 2 0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s0m0_sclk_tx
|
|
&i2s0m0_lrck_tx
|
|
&i2s0m0_sdo0
|
|
&i2s0m0_sdo1_sdi3>;
|
|
};
|
|
|
|
&iep {
|
|
status = "okay";
|
|
};
|
|
|
|
&iep_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mdio {
|
|
phy: phy@0 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0x0>;
|
|
clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
|
|
};
|
|
};
|
|
|
|
&mipi_csi2 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_csi2_input: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&csidphy0_out>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_csi2_output: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&cif_mipi_in>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&mipi_dphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&nandc {
|
|
/delete-property/ pinctrl-names;
|
|
/delete-property/ pinctrl-0;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
nand@0 {
|
|
reg = <0>;
|
|
nand-bus-width = <8>;
|
|
nand-ecc-mode = "hw";
|
|
nand-ecc-strength = <16>;
|
|
nand-ecc-step-size = <1024>;
|
|
};
|
|
};
|
|
|
|
&npu {
|
|
npu-supply = <&vdd_npu>;
|
|
status = "okay";
|
|
};
|
|
|
|
&npu_tsadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&optee {
|
|
status = "disabled";
|
|
};
|
|
|
|
&otp {
|
|
status = "okay";
|
|
};
|
|
|
|
&pdm {
|
|
status = "disabled";
|
|
#sound-dai-cells = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pdmm0_clk
|
|
&pdmm0_clk1
|
|
&pdmm0_sdi0
|
|
&pdmm0_sdi1
|
|
&pdmm0_sdi2>;
|
|
};
|
|
|
|
&pinctrl {
|
|
pmic {
|
|
/omit-if-no-ref/
|
|
pmic_int: pmic_int {
|
|
rockchip,pins =
|
|
<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
|
rockchip,pins =
|
|
<0 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>;
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
soc_slppin_slp: soc_slppin_slp {
|
|
rockchip,pins =
|
|
<0 RK_PB2 1 &pcfg_pull_none>;
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
soc_slppin_rst: soc_slppin_rst {
|
|
rockchip,pins =
|
|
<0 RK_PB2 2 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
/omit-if-no-ref/
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
wireless-wlan {
|
|
/omit-if-no-ref/
|
|
wifi_wake_host: wifi-wake-host {
|
|
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
|
|
pmuio0-supply = <&vcc1v8_pmu>;
|
|
pmuio1-supply = <&vcc3v3_sys>;
|
|
vccio2-supply = <&vccio_sd>;
|
|
vccio3-supply = <&vcc_1v8>;
|
|
vccio4-supply = <&vcc_1v8>;
|
|
vccio5-supply = <&vcc_3v3>;
|
|
vccio6-supply = <&vcc_1v8>;
|
|
vccio7-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm0m0_pins_pull_down>;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm1m0_pins_pull_down>;
|
|
};
|
|
|
|
&pwm3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ramoops {
|
|
status = "okay";
|
|
};
|
|
|
|
&rk_rga {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkcif {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkcif_mmu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&rkcif_dvp {
|
|
status = "okay";
|
|
|
|
port {
|
|
/* Parallel bus endpoint */
|
|
/*
|
|
cif_para_in: endpoint {
|
|
remote-endpoint = <&cam_para_out1>;
|
|
bus-width = <12>;
|
|
hsync-active = <1>;
|
|
vsync-active = <0>;
|
|
};
|
|
*/
|
|
};
|
|
};
|
|
|
|
&rkcif_mipi_lvds {
|
|
status = "okay";
|
|
|
|
port {
|
|
/* MIPI CSI-2 endpoint */
|
|
cif_mipi_in: endpoint {
|
|
remote-endpoint = <&mipi_csi2_output>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkcif_mipi_lvds_sditf {
|
|
status = "okay";
|
|
|
|
port {
|
|
/* MIPI CSI-2 endpoint */
|
|
mipi_lvds_sditf: endpoint {
|
|
remote-endpoint = <&isp_in>;
|
|
data-lanes = <1 2 3 4>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkisp {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkisp_vir0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp_in: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&mipi_lvds_sditf>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkisp_mmu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&rkispp {
|
|
status = "okay";
|
|
/* the max input w h and fps of mulit sensor */
|
|
//max-input = <2688 1520 30>;
|
|
};
|
|
|
|
&rkispp_vir0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkispp_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc {
|
|
venc-supply = <&vdd_vepu>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rng {
|
|
status = "okay";
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
rockchip,sleep-debug-en = <1>;
|
|
rockchip,sleep-mode-config = <
|
|
(0
|
|
| RKPM_SLP_ARMOFF
|
|
| RKPM_SLP_PMU_PMUALIVE_32K
|
|
| RKPM_SLP_PMU_DIS_OSC
|
|
| RKPM_SLP_PMIC_LP
|
|
)
|
|
>;
|
|
rockchip,wakeup-config = <
|
|
(0
|
|
| RKPM_GPIO_WKUP_EN
|
|
)
|
|
>;
|
|
};
|
|
|
|
&route_dsi {
|
|
status = "okay";
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
card-detect-delay = <200>;
|
|
rockchip,default-sample-phase = <90>;
|
|
no-sdio;
|
|
no-mmc;
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr104;
|
|
vqmmc-supply = <&vccio_sd>;
|
|
vmmc-supply = <&vcc3v3_sd>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdio {
|
|
max-frequency = <200000000>;
|
|
bus-width = <4>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
non-removable;
|
|
rockchip,default-sample-phase = <90>;
|
|
sd-uhs-sdr104;
|
|
no-sd;
|
|
no-mmc;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sfc {
|
|
/delete-property/ pinctrl-names;
|
|
/delete-property/ pinctrl-0;
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "spi-nand";
|
|
reg = <0>;
|
|
spi-max-frequency = <80000000>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-tx-bus-width = <1>;
|
|
};
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
vup-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
|
|
u2phy_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
u2phy_host: host-port {
|
|
status = "okay";
|
|
phy-supply = <&vcc5v0_host>;
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_ctsn>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3 {
|
|
status = "okay";
|
|
extcon = <&u2phy0>;
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|