595 lines
16 KiB
C
595 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* maxim-max96752.c -- I2C register interface access for max96752 serdes chip
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*
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* Copyright (c) 2023-2028 Rockchip Electronics Co. Ltd.
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*
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* Author: luowei <lw@rock-chips.com>
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*/
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#include "../core.h"
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#include "maxim-max96752.h"
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struct config_desc {
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u16 reg;
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u8 mask;
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u8 val;
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};
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struct serdes_group_data {
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const struct config_desc *configs;
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int num_configs;
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};
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static int MAX96752_GPIO0_pins[] = {0};
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static int MAX96752_GPIO1_pins[] = {1};
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static int MAX96752_GPIO2_pins[] = {2};
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static int MAX96752_GPIO3_pins[] = {3};
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static int MAX96752_GPIO4_pins[] = {4};
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static int MAX96752_GPIO5_pins[] = {5};
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static int MAX96752_GPIO6_pins[] = {6};
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static int MAX96752_GPIO7_pins[] = {7};
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static int MAX96752_GPIO8_pins[] = {8};
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static int MAX96752_GPIO9_pins[] = {9};
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static int MAX96752_GPIO10_pins[] = {10};
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static int MAX96752_GPIO11_pins[] = {11};
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static int MAX96752_GPIO12_pins[] = {12};
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static int MAX96752_GPIO13_pins[] = {13};
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static int MAX96752_GPIO14_pins[] = {14};
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static int MAX96752_GPIO15_pins[] = {15};
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#define GROUP_DESC(nm) \
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{ \
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.name = #nm, \
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.pins = nm ## _pins, \
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.num_pins = ARRAY_SIZE(nm ## _pins), \
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}
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struct serdes_function_data {
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u8 gpio_out_dis:1;
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u8 gpio_tx_en:1;
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u8 gpio_rx_en:1;
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u8 gpio_in_level:1;
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u8 gpio_out_level:1;
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u8 gpio_tx_id;
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u8 gpio_rx_id;
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u16 mdelay;
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};
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static const char *serdes_gpio_groups[] = {
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"MAX96752_GPIO0", "MAX96752_GPIO1", "MAX96752_GPIO2", "MAX96752_GPIO3",
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"MAX96752_GPIO4", "MAX96752_GPIO5", "MAX96752_GPIO6", "MAX96752_GPIO7",
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"MAX96752_GPIO8", "MAX96752_GPIO9", "MAX96752_GPIO10", "MAX96752_GPIO11",
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"MAX96752_GPIO12", "MAX96752_GPIO13", "MAX96752_GPIO14", "MAX96752_GPIO15",
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};
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#define FUNCTION_DESC_GPIO_INPUT_BYPASS(id) \
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{ \
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.name = "SER_TO_DES_RXID"#id, \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_rx_en = 1, .gpio_rx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_OUTPUT_BYPASS(id) \
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{ \
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.name = "DES_TXID"#id"_TO_SER", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_out_dis = 1, .gpio_tx_en = 1, .gpio_tx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_OUTPUT_LOW(id) \
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{ \
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.name = "DES_TXID"#id"_OUTPUT_LOW", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_out_dis = 0, .gpio_tx_en = 0, \
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.gpio_rx_en = 0, .gpio_out_level = 0, .gpio_tx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_OUTPUT_HIGH(id) \
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{ \
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.name = "DES_TXID"#id"_OUTPUT_HIGH", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .gpio_out_dis = 0, .gpio_tx_en = 0, \
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.gpio_rx_en = 0, .gpio_out_level = 1, .gpio_tx_id = id } \
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}, \
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} \
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#define FUNCTION_DES_DELAY_MS(ms) \
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{ \
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.name = "DELAY_"#ms"MS", \
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.group_names = serdes_gpio_groups, \
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.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
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.data = (void *)(const struct serdes_function_data []) { \
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{ .mdelay = ms, } \
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}, \
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} \
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static struct pinctrl_pin_desc max96752_pins_desc[] = {
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PINCTRL_PIN(MAXIM_MAX96752_GPIO0, "MAX96752_GPIO0"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO1, "MAX96752_GPIO1"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO2, "MAX96752_GPIO2"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO3, "MAX96752_GPIO3"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO4, "MAX96752_GPIO4"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO5, "MAX96752_GPIO5"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO6, "MAX96752_GPIO6"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO7, "MAX96752_GPIO7"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO8, "MAX96752_GPIO8"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO9, "MAX96752_GPIO9"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO10, "MAX96752_GPIO10"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO11, "MAX96752_GPIO11"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO12, "MAX96752_GPIO12"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO13, "MAX96752_GPIO13"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO14, "MAX96752_GPIO14"),
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PINCTRL_PIN(MAXIM_MAX96752_GPIO15, "MAX96752_GPIO15"),
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};
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static struct group_desc max96752_groups_desc[] = {
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GROUP_DESC(MAX96752_GPIO0),
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GROUP_DESC(MAX96752_GPIO1),
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GROUP_DESC(MAX96752_GPIO2),
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GROUP_DESC(MAX96752_GPIO3),
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GROUP_DESC(MAX96752_GPIO4),
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GROUP_DESC(MAX96752_GPIO5),
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GROUP_DESC(MAX96752_GPIO6),
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GROUP_DESC(MAX96752_GPIO7),
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GROUP_DESC(MAX96752_GPIO8),
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GROUP_DESC(MAX96752_GPIO9),
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GROUP_DESC(MAX96752_GPIO10),
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GROUP_DESC(MAX96752_GPIO11),
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GROUP_DESC(MAX96752_GPIO12),
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GROUP_DESC(MAX96752_GPIO13),
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GROUP_DESC(MAX96752_GPIO14),
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GROUP_DESC(MAX96752_GPIO15),
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};
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static struct function_desc max96752_functions_desc[] = {
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FUNCTION_DESC_GPIO_INPUT_BYPASS(0),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(1),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(2),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(3),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(4),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(5),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(6),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(7),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(8),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(9),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(10),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(11),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(12),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(13),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(14),
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FUNCTION_DESC_GPIO_INPUT_BYPASS(15),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(0),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(1),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(2),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(3),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(4),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(5),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(6),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(7),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(8),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(9),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(10),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(11),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(12),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(13),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(14),
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FUNCTION_DESC_GPIO_OUTPUT_BYPASS(15),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(0),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(1),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(2),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(3),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(4),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(5),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(6),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(7),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(8),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(9),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(10),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(11),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(12),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(13),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(14),
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FUNCTION_DESC_GPIO_OUTPUT_LOW(15),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(0),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(1),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(2),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(3),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(4),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(5),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(6),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(7),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(8),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(9),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(10),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(11),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(12),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(13),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(14),
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FUNCTION_DESC_GPIO_OUTPUT_HIGH(15),
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FUNCTION_DES_DELAY_MS(10),
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FUNCTION_DES_DELAY_MS(50),
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FUNCTION_DES_DELAY_MS(100),
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FUNCTION_DES_DELAY_MS(200),
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FUNCTION_DES_DELAY_MS(500),
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};
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static struct serdes_chip_pinctrl_info max96752_pinctrl_info = {
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.pins = max96752_pins_desc,
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.num_pins = ARRAY_SIZE(max96752_pins_desc),
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.groups = max96752_groups_desc,
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.num_groups = ARRAY_SIZE(max96752_groups_desc),
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.functions = max96752_functions_desc,
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.num_functions = ARRAY_SIZE(max96752_functions_desc),
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};
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static int max96752_panel_prepare(struct serdes *serdes)
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{
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return 0;
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}
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static int max96752_panel_unprepare(struct serdes *serdes)
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{
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//serdes_reg_write(serdes, 0x0215, 0x80); /* lcd_en */
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return 0;
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}
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static int max96752_panel_enable(struct serdes *serdes)
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{
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return 0;
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}
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static int max96752_panel_disable(struct serdes *serdes)
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{
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return 0;
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}
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static int max96752_panel_backlight_enable(struct serdes *serdes)
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{
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return 0;
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}
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static int max96752_panel_backlight_disable(struct serdes *serdes)
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{
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return 0;
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}
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static struct serdes_chip_panel_ops max96752_panel_ops = {
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.prepare = max96752_panel_prepare,
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.unprepare = max96752_panel_unprepare,
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.enable = max96752_panel_enable,
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.disable = max96752_panel_disable,
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.backlight_enable = max96752_panel_backlight_enable,
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.backlight_disable = max96752_panel_backlight_disable,
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};
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static int max96752_pinctrl_set_pin_mux(struct serdes *serdes,
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unsigned int pin_selector,
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unsigned int func_selector)
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{
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struct function_desc *func;
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struct pinctrl_pin_desc *pin;
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int offset;
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u16 ms;
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func = &serdes->chip_data->pinctrl_info->functions[func_selector];
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if (!func) {
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printf("%s: func is null\n", __func__);
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return -EINVAL;
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}
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pin = &serdes->chip_data->pinctrl_info->pins[pin_selector];
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if (!pin) {
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printf("%s: pin is null\n", __func__);
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return -EINVAL;
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}
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SERDES_DBG_CHIP("%s: serdes %s func=%s data=%p pin=%s num=%d\n",
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__func__, serdes->dev->name,
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func->name, func->data,
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pin->name, pin->number);
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if (func->data) {
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struct serdes_function_data *fdata = func->data;
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ms = fdata->mdelay;
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offset = pin->number;
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if (offset > 32)
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dev_err(serdes->dev, "%s offset=%d > 32\n",
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serdes->dev->name, offset);
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else
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SERDES_DBG_CHIP("%s: serdes %s txid=%d rxid=%d off=%d\n",
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__func__, serdes->dev->name,
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fdata->gpio_tx_id, fdata->gpio_rx_id, offset);
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if (!ms) {
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serdes_set_bits(serdes, GPIO_A_REG(offset),
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GPIO_OUT_DIS | GPIO_RX_EN | GPIO_TX_EN | GPIO_OUT,
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FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) |
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FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) |
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FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) |
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FIELD_PREP(GPIO_OUT, fdata->gpio_out_level));
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if (fdata->gpio_tx_en)
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serdes_set_bits(serdes,
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GPIO_B_REG(offset),
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GPIO_TX_ID,
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FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));
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if (fdata->gpio_rx_en)
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serdes_set_bits(serdes,
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GPIO_C_REG(offset),
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GPIO_RX_ID,
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FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));
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} else {
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mdelay(ms);
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SERDES_DBG_CHIP("%s: delay %dms\n", __func__, ms);
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}
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}
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return 0;
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}
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static int max96752_pinctrl_set_grp_mux(struct serdes *serdes,
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unsigned int group_selector,
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unsigned int func_selector)
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{
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struct serdes_pinctrl *pinctrl = serdes->serdes_pinctrl;
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struct function_desc *func;
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struct group_desc *grp;
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int i, offset;
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u16 ms;
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func = &serdes->chip_data->pinctrl_info->functions[func_selector];
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if (!func) {
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printf("%s: func is null\n", __func__);
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return -EINVAL;
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}
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grp = &serdes->chip_data->pinctrl_info->groups[group_selector];
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if (!grp) {
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printf("%s: grp is null\n", __func__);
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return -EINVAL;
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}
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SERDES_DBG_CHIP("%s: serdes %s func=%s data=%p grp=%s data=%p, num=%d\n",
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__func__, serdes->chip_data->name, func->name,
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func->data, grp->name, grp->data, grp->num_pins);
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if (func->data) {
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struct serdes_function_data *fdata = func->data;
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ms = fdata->mdelay;
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for (i = 0; i < grp->num_pins; i++) {
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offset = grp->pins[i] - pinctrl->pin_base;
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if (offset > 32)
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dev_err(serdes->dev, "%s offset=%d > 32\n",
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serdes->dev->name, offset);
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else
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SERDES_DBG_CHIP("%s: serdes %s txid=%d rxid=%d off=%d\n",
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__func__, serdes->dev->name,
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fdata->gpio_tx_id, fdata->gpio_rx_id, offset);
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if (!ms) {
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serdes_set_bits(serdes, GPIO_A_REG(offset),
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GPIO_OUT_DIS | GPIO_RX_EN | GPIO_TX_EN | GPIO_OUT,
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FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) |
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FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) |
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FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) |
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FIELD_PREP(GPIO_OUT, fdata->gpio_out_level));
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if (fdata->gpio_tx_en)
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serdes_set_bits(serdes,
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GPIO_B_REG(offset),
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GPIO_TX_ID,
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FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));
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if (fdata->gpio_rx_en)
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serdes_set_bits(serdes,
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GPIO_C_REG(offset),
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GPIO_RX_ID,
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FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));
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} else {
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mdelay(ms);
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SERDES_DBG_CHIP("%s: delay %dms\n", __func__, ms);
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}
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}
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}
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if (grp->data) {
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struct serdes_group_data *gdata = grp->data;
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for (i = 0; i < gdata->num_configs; i++) {
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const struct config_desc *config = &gdata->configs[i];
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serdes_set_bits(serdes, config->reg,
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config->mask, config->val);
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}
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}
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return 0;
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}
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static int max96752_pinctrl_config_set(struct serdes *serdes,
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unsigned int pin_selector,
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unsigned int param,
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unsigned int argument)
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{
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u8 res_cfg;
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switch (param) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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serdes_set_bits(serdes, GPIO_B_REG(pin_selector),
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OUT_TYPE, FIELD_PREP(OUT_TYPE, 0));
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break;
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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serdes_set_bits(serdes, GPIO_B_REG(pin_selector),
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OUT_TYPE, FIELD_PREP(OUT_TYPE, 1));
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break;
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case PIN_CONFIG_BIAS_DISABLE:
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serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
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PULL_UPDN_SEL,
|
|
FIELD_PREP(PULL_UPDN_SEL, 0));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
switch (argument) {
|
|
case 40000:
|
|
res_cfg = 0;
|
|
break;
|
|
case 1000000:
|
|
res_cfg = 1;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
|
|
RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
|
|
serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
|
|
PULL_UPDN_SEL,
|
|
FIELD_PREP(PULL_UPDN_SEL, 1));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
switch (argument) {
|
|
case 40000:
|
|
res_cfg = 0;
|
|
break;
|
|
case 1000000:
|
|
res_cfg = 1;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
|
|
RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
|
|
serdes_set_bits(serdes, GPIO_C_REG(pin_selector),
|
|
PULL_UPDN_SEL,
|
|
FIELD_PREP(PULL_UPDN_SEL, 2));
|
|
break;
|
|
case PIN_CONFIG_OUTPUT:
|
|
serdes_set_bits(serdes, GPIO_A_REG(pin_selector),
|
|
GPIO_OUT_DIS | GPIO_OUT,
|
|
FIELD_PREP(GPIO_OUT_DIS, 0) |
|
|
FIELD_PREP(GPIO_OUT, argument));
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct serdes_chip_pinctrl_ops max96752_pinctrl_ops = {
|
|
.pinconf_set = max96752_pinctrl_config_set,
|
|
.pinmux_set = max96752_pinctrl_set_pin_mux,
|
|
.pinmux_group_set = max96752_pinctrl_set_grp_mux,
|
|
};
|
|
|
|
static int max96752_gpio_direction_input(struct serdes *serdes, int gpio)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int max96752_gpio_direction_output(struct serdes *serdes,
|
|
int gpio, int value)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int max96752_gpio_get_level(struct serdes *serdes, int gpio)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int max96752_gpio_set_level(struct serdes *serdes, int gpio, int value)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int max96752_gpio_set_config(struct serdes *serdes,
|
|
int gpio, unsigned long config)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int max96752_gpio_to_irq(struct serdes *serdes, int gpio)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static struct serdes_chip_gpio_ops max96752_gpio_ops = {
|
|
.direction_input = max96752_gpio_direction_input,
|
|
.direction_output = max96752_gpio_direction_output,
|
|
.get_level = max96752_gpio_get_level,
|
|
.set_level = max96752_gpio_set_level,
|
|
.set_config = max96752_gpio_set_config,
|
|
.to_irq = max96752_gpio_to_irq,
|
|
};
|
|
|
|
static int max96752_set_i2c_addr(struct serdes *serdes, int address, int link)
|
|
{
|
|
int ret;
|
|
|
|
if (link == LINKA) {
|
|
/* TX_SRC_ID[1] = 0 */
|
|
ret = serdes_reg_write(serdes, 0x73, 0x31);
|
|
/* Receive packets with this stream ID = 0 */
|
|
ret = serdes_reg_write(serdes, 0x50, 0x00);
|
|
ret = serdes_reg_write(serdes, 0x00, address << 1);
|
|
} else if (link == LINKB) {
|
|
/* TX_SRC_ID[1] = 1 */
|
|
ret = serdes_reg_write(serdes, 0x73, 0x32);
|
|
/* Receive packets with this stream ID = 1 */
|
|
ret = serdes_reg_write(serdes, 0x50, 0x01);
|
|
ret = serdes_reg_write(serdes, 0x00, address << 1);
|
|
} else {
|
|
dev_info(serdes->dev, "link %d is error\n", link);
|
|
ret = -1;
|
|
}
|
|
|
|
SERDES_DBG_CHIP("%s: set serdes chip %s i2c 7bit address to 0x%x\n", __func__,
|
|
serdes->chip_data->name, address);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct serdes_chip_split_ops max96752_split_ops = {
|
|
.set_i2c_addr = max96752_set_i2c_addr,
|
|
};
|
|
|
|
struct serdes_chip_data serdes_max96752_data = {
|
|
.name = "max96752",
|
|
.serdes_type = TYPE_DES,
|
|
.serdes_id = MAXIM_ID_MAX96752,
|
|
.connector_type = DRM_MODE_CONNECTOR_LVDS,
|
|
.pinctrl_info = &max96752_pinctrl_info,
|
|
.panel_ops = &max96752_panel_ops,
|
|
.pinctrl_ops = &max96752_pinctrl_ops,
|
|
.split_ops = &max96752_split_ops,
|
|
.gpio_ops = &max96752_gpio_ops,
|
|
};
|
|
EXPORT_SYMBOL_GPL(serdes_max96752_data);
|
|
|
|
MODULE_LICENSE("GPL");
|