550 lines
14 KiB
C
550 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright © 2009 Keith Packard
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
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*
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#include <common.h>
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#include <drm/drm_dp_helper.h>
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/**
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* DOC: dp helpers
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*
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* These functions contain some common logic and helpers at various abstraction
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* levels to deal with Display Port sink devices and related things like DP aux
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* channel transfers, EDID reading over DP aux channels, decoding certain DPCD
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* blocks, ...
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*/
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/* Helpers for DP link training */
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static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
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{
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return link_status[r - DP_LANE0_1_STATUS];
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}
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static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_LANE0_1_STATUS + (lane >> 1);
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int s = (lane & 1) * 4;
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u8 l = dp_link_status(link_status, i);
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return (l >> s) & 0xf;
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}
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bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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u8 lane_align;
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u8 lane_status;
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int lane;
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lane_align = dp_link_status(link_status,
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DP_LANE_ALIGN_STATUS_UPDATED);
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if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
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return false;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
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return false;
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}
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return true;
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}
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bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count)
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{
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int lane;
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u8 lane_status;
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for (lane = 0; lane < lane_count; lane++) {
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lane_status = dp_get_lane_status(link_status, lane);
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if ((lane_status & DP_LANE_CR_DONE) == 0)
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return false;
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}
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return true;
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}
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u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
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DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
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}
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u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane)
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{
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int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
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int s = ((lane & 1) ?
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DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
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DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
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u8 l = dp_link_status(link_status, i);
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return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
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}
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void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
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{
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int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
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DP_TRAINING_AUX_RD_MASK;
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if (rd_interval > 4)
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printf("AUX interval %d, out of range (max 4)\n", rd_interval);
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if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
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udelay(100);
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else
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mdelay(rd_interval * 4);
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}
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void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
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{
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int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
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DP_TRAINING_AUX_RD_MASK;
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if (rd_interval > 4)
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printf("AUX interval %d, out of range (max 4)\n", rd_interval);
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if (rd_interval == 0)
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udelay(400);
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else
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mdelay(rd_interval * 4);
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}
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u8 drm_dp_link_rate_to_bw_code(int link_rate)
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{
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switch (link_rate) {
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default:
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WARN(1, "unknown DP link rate %d, using %x\n", link_rate,
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DP_LINK_BW_1_62);
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case 162000:
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return DP_LINK_BW_1_62;
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case 270000:
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return DP_LINK_BW_2_7;
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case 540000:
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return DP_LINK_BW_5_4;
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case 810000:
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return DP_LINK_BW_8_1;
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}
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}
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int drm_dp_bw_code_to_link_rate(u8 link_bw)
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{
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switch (link_bw) {
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default:
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WARN(1, "unknown DP link BW code %x, using 162000\n", link_bw);
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case DP_LINK_BW_1_62:
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return 162000;
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case DP_LINK_BW_2_7:
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return 270000;
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case DP_LINK_BW_5_4:
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return 540000;
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case DP_LINK_BW_8_1:
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return 810000;
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}
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}
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#define AUX_RETRY_INTERVAL 500 /* us */
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static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
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unsigned int offset, void *buffer, size_t size)
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{
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struct drm_dp_aux_msg msg;
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unsigned int retry, native_reply;
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int err = 0, ret = 0;
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memset(&msg, 0, sizeof(msg));
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msg.address = offset;
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msg.request = request;
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msg.buffer = buffer;
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msg.size = size;
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/*
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* The specification doesn't give any recommendation on how often to
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* retry native transactions. We used to retry 7 times like for
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* aux i2c transactions but real world devices this wasn't
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* sufficient, bump to 32 which makes Dell 4k monitors happier.
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*/
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for (retry = 0; retry < 32; retry++) {
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if (ret != 0 && ret != -ETIMEDOUT)
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udelay(AUX_RETRY_INTERVAL);
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ret = aux->transfer(aux, &msg);
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if (ret >= 0) {
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native_reply = msg.reply & DP_AUX_NATIVE_REPLY_MASK;
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if (native_reply == DP_AUX_NATIVE_REPLY_ACK) {
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if (ret == size)
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goto out;
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ret = -EPROTO;
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} else {
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ret = -EIO;
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}
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}
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/*
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* We want the error we return to be the error we received on
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* the first transaction, since we may get a different error the
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* next time we retry
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*/
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if (!err)
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err = ret;
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}
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printf("%s: Too many retries, giving up. First error: %d\n",
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aux->name, err);
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ret = err;
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out:
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return ret;
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}
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ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
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void *buffer, size_t size)
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{
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int ret;
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ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV,
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buffer, 1);
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if (ret != 1)
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goto out;
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ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset,
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buffer, size);
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out:
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return ret;
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}
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ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
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void *buffer, size_t size)
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{
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int ret;
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ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset,
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buffer, size);
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return ret;
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}
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int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
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u8 status[DP_LINK_STATUS_SIZE])
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{
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return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
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DP_LINK_STATUS_SIZE);
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}
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static int drm_dp_read_extended_dpcd_caps(struct drm_dp_aux *aux,
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u8 dpcd[DP_RECEIVER_CAP_SIZE])
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{
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u8 dpcd_ext[6];
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int ret;
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/*
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* Prior to DP1.3 the bit represented by
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* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
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* If it is set DP_DPCD_REV at 0000h could be at a value less than
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* the true capability of the panel. The only way to check is to
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* then compare 0000h and 2200h.
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*/
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if (!(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
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DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
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return 0;
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ret = drm_dp_dpcd_read(aux, DP_DP13_DPCD_REV, &dpcd_ext,
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sizeof(dpcd_ext));
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if (ret < 0)
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return ret;
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if (ret != sizeof(dpcd_ext))
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return -EIO;
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if (dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
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printf("%s: Extended DPCD rev less than base DPCD rev (%d > %d)\n",
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aux->name, dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]);
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return 0;
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}
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if (!memcmp(dpcd, dpcd_ext, sizeof(dpcd_ext)))
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return 0;
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debug("%s: Base DPCD: %*ph\n",
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aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
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memcpy(dpcd, dpcd_ext, sizeof(dpcd_ext));
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return 0;
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}
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int drm_dp_read_dpcd_caps(struct drm_dp_aux *aux,
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u8 dpcd[DP_RECEIVER_CAP_SIZE])
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{
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int ret;
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ret = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, DP_RECEIVER_CAP_SIZE);
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if (ret < 0)
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return ret;
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if (ret != DP_RECEIVER_CAP_SIZE || dpcd[DP_DPCD_REV] == 0)
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return -EIO;
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ret = drm_dp_read_extended_dpcd_caps(aux, dpcd);
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if (ret < 0)
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return ret;
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debug("%s: DPCD: %*ph\n",
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aux->name, DP_RECEIVER_CAP_SIZE, dpcd);
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return ret;
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}
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static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg)
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{
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/*
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* In case of i2c defer or short i2c ack reply to a write,
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* we need to switch to WRITE_STATUS_UPDATE to drain the
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* rest of the message
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*/
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if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) {
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msg->request &= DP_AUX_I2C_MOT;
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msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE;
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}
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}
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static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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{
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unsigned int retry, defer_i2c;
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int ret;
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/*
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* DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
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* is required to retry at least seven times upon receiving AUX_DEFER
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* before giving up the AUX transaction.
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*
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* We also try to account for the i2c bus speed.
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*/
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int max_retries = 7;
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for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c);
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retry++) {
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ret = aux->transfer(aux, msg);
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if (ret < 0) {
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if (ret == -EBUSY)
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continue;
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/*
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* While timeouts can be errors, they're usually normal
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* behavior (for instance, when a driver tries to
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* communicate with a non-existent DisplayPort device).
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* Avoid spamming the kernel log with timeout errors.
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*/
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if (ret == -ETIMEDOUT)
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printf("%s: transaction timed out\n",
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aux->name);
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else
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printf("%s: transaction failed: %d\n",
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aux->name, ret);
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return ret;
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}
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switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
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case DP_AUX_NATIVE_REPLY_ACK:
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/*
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* For I2C-over-AUX transactions this isn't enough, we
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* need to check for the I2C ACK reply.
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*/
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break;
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case DP_AUX_NATIVE_REPLY_NACK:
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printf("%s: native nack (result=%d, size=%zu)\n",
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aux->name, ret, msg->size);
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return -EREMOTEIO;
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case DP_AUX_NATIVE_REPLY_DEFER:
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printf("%s: native defer\n", aux->name);
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/*
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* We could check for I2C bit rate capabilities and if
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* available adjust this interval. We could also be
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* more careful with DP-to-legacy adapters where a
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* long legacy cable may force very low I2C bit rates.
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*
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* For now just defer for long enough to hopefully be
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* safe for all use-cases.
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*/
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udelay(AUX_RETRY_INTERVAL);
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continue;
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default:
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printf("%s: invalid native reply %#04x\n",
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aux->name, msg->reply);
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return -EREMOTEIO;
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}
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switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
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case DP_AUX_I2C_REPLY_ACK:
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/*
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* Both native ACK and I2C ACK replies received. We
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* can assume the transfer was successful.
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*/
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if (ret != msg->size)
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drm_dp_i2c_msg_write_status_update(msg);
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return ret;
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case DP_AUX_I2C_REPLY_NACK:
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printf("%s: I2C nack (result=%d, size=%zu)\n",
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aux->name, ret, msg->size);
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aux->i2c_nack_count++;
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return -EREMOTEIO;
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case DP_AUX_I2C_REPLY_DEFER:
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printf("%s: I2C defer\n", aux->name);
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/* DP Compliance Test 4.2.2.5 Requirement:
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* Must have at least 7 retries for I2C defers on the
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* transaction to pass this test
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*/
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aux->i2c_defer_count++;
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if (defer_i2c < 7)
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defer_i2c++;
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udelay(AUX_RETRY_INTERVAL);
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drm_dp_i2c_msg_write_status_update(msg);
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continue;
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default:
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printf("%s: invalid I2C reply %#04x\n",
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aux->name, msg->reply);
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return -EREMOTEIO;
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}
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}
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printf("%s: Too many retries, giving up\n", aux->name);
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return -EREMOTEIO;
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}
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static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg,
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const struct i2c_msg *i2c_msg)
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{
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msg->request = (i2c_msg->flags & I2C_M_RD) ?
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DP_AUX_I2C_READ : DP_AUX_I2C_WRITE;
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if (!(i2c_msg->flags & I2C_M_STOP))
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msg->request |= DP_AUX_I2C_MOT;
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}
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/*
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* Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
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*
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* Returns an error code on failure, or a recommended transfer size on success.
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*/
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static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux,
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struct drm_dp_aux_msg *orig_msg)
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{
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int err, ret = orig_msg->size;
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struct drm_dp_aux_msg msg = *orig_msg;
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while (msg.size > 0) {
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err = drm_dp_i2c_do_msg(aux, &msg);
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if (err <= 0)
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return err == 0 ? -EPROTO : err;
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if (err < msg.size && err < ret) {
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printf("%s: Reply: requested %zu bytes got %d bytes\n",
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aux->name, msg.size, err);
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ret = err;
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}
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msg.size -= err;
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msg.buffer += err;
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}
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return ret;
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}
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int drm_dp_i2c_xfer(struct ddc_adapter *adapter, struct i2c_msg *msgs,
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int num)
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{
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struct drm_dp_aux *aux = container_of(adapter, struct drm_dp_aux, ddc);
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unsigned int i, j;
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unsigned int transfer_size;
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struct drm_dp_aux_msg msg;
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int err = 0;
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memset(&msg, 0, sizeof(msg));
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for (i = 0; i < num; i++) {
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msg.address = msgs[i].addr;
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drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
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/* Send a bare address packet to start the transaction.
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* Zero sized messages specify an address only (bare
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* address) transaction.
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*/
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msg.buffer = NULL;
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msg.size = 0;
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err = drm_dp_i2c_do_msg(aux, &msg);
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/*
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* Reset msg.request in case in case it got
|
|
* changed into a WRITE_STATUS_UPDATE.
|
|
*/
|
|
drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
|
|
|
|
if (err < 0)
|
|
break;
|
|
/* We want each transaction to be as large as possible, but
|
|
* we'll go to smaller sizes if the hardware gives us a
|
|
* short reply.
|
|
*/
|
|
transfer_size = DP_AUX_MAX_PAYLOAD_BYTES;
|
|
for (j = 0; j < msgs[i].len; j += msg.size) {
|
|
msg.buffer = msgs[i].buf + j;
|
|
msg.size = min(transfer_size, msgs[i].len - j);
|
|
|
|
err = drm_dp_i2c_drain_msg(aux, &msg);
|
|
|
|
/*
|
|
* Reset msg.request in case in case it got
|
|
* changed into a WRITE_STATUS_UPDATE.
|
|
*/
|
|
drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
|
|
|
|
if (err < 0)
|
|
break;
|
|
transfer_size = err;
|
|
}
|
|
if (err < 0)
|
|
break;
|
|
}
|
|
if (err >= 0)
|
|
err = num;
|
|
/* Send a bare address packet to close out the transaction.
|
|
* Zero sized messages specify an address only (bare
|
|
* address) transaction.
|
|
*/
|
|
msg.request &= ~DP_AUX_I2C_MOT;
|
|
msg.buffer = NULL;
|
|
msg.size = 0;
|
|
(void)drm_dp_i2c_do_msg(aux, &msg);
|
|
|
|
return err;
|
|
}
|
|
|