79 lines
2.6 KiB
C
79 lines
2.6 KiB
C
/*
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* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/arm/css/css_mhu_doorbell.h>
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#include <drivers/arm/css/scmi.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/css/common/css_pm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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#if CSS_USE_SCMI_SDS_DRIVER
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static scmi_channel_plat_info_t juno_scmi_plat_info = {
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.scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
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.db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
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.db_preserve_mask = 0xfffffffe,
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.db_modify_mask = 0x1,
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.ring_doorbell = &mhu_ring_doorbell,
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};
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scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id)
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{
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return &juno_scmi_plat_info;
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}
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#endif
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/*
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* On Juno, the system power level is the highest power level.
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* The first entry in the power domain descriptor specifies the
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* number of system power domains i.e. 1.
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*/
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#define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT
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/*
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* The Juno power domain tree descriptor. The cluster power domains
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* are arranged so that when the PSCI generic code creates the power
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* domain tree, the indices of the CPU power domain nodes it allocates
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* match the linear indices returned by plat_core_pos_by_mpidr()
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* i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher
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* indices for CLUSTER0 CPUs.
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*/
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static const unsigned char juno_power_domain_tree_desc[] = {
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/* No of root nodes */
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JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL,
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/* No of children for the root node */
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JUNO_CLUSTER_COUNT,
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/* No of children for the first cluster node */
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JUNO_CLUSTER1_CORE_COUNT,
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/* No of children for the second cluster node */
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JUNO_CLUSTER0_CORE_COUNT
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};
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/*******************************************************************************
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* This function returns the Juno topology tree information.
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******************************************************************************/
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const unsigned char *plat_get_power_domain_tree_desc(void)
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{
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return juno_power_domain_tree_desc;
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}
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/*******************************************************************************
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* This function returns the core count within the cluster corresponding to
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* `mpidr`.
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******************************************************************************/
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unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
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{
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return (((mpidr & (u_register_t) 0x100) != 0U) ?
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JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT);
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}
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/*
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* The array mapping platform core position (implemented by plat_my_core_pos())
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* to the SCMI power domain ID implemented by SCP.
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*/
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const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
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2, 3, 4, 5, 0, 1 };
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