149 lines
3.8 KiB
ArmAsm
149 lines
3.8 KiB
ArmAsm
/*
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* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <platform_def.h>
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.globl plat_secondary_cold_boot_setup
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.globl plat_report_exception
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.globl platform_is_primary_cpu
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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.globl platform_mem_init
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.macro crash_ram_log
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/*
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* Check teearg->atf_log_buf_size.
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* Exit if atf_log_buf_size equals 0
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*/
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adr x2, ptr_atf_crash_flag
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ldr x2, [x2]
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/* exit if ptr_atf_crash_flag equals NULL */
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cbz x2, exit_putc
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/*
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* set atf crash magic number
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*/
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1:
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adr x2, ptr_atf_crash_flag
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ldr x2, [x2]
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mov_imm x1, 0xdead1abf
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/* p_atf_log_ctrl->atf_crash_flag = 0xdead1abf */
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str w1, [x2]
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/* can't use w3 return addr, w4, start of buffer addr */
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ldr w2, [x2]
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cmp w2, w1
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b.ne 1b
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/*
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* get cpu id
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*/
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mrs x1, mpidr_el1
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/* refer to platform_get_core_pos */
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and x2, x1, #MPIDR_CPU_MASK
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and x1, x1, #MPIDR_CLUSTER_MASK
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/* x1 = cpu id (cpu id = aff0 + aff1*4 ) */
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add x1, x2, x1, LSR #6
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adr x2, ptr_atf_except_write_pos_per_cpu
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ldr x2, [x2]
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/*
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* plus (cpu_id * 8)-->
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* &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]
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* x2 = &p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id];
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*/
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add x2, x2, x1, LSL # 3
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/* log write */
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/* w1 = p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] */
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ldr x1, [x2]
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/* *x1 = w0-->
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* *(p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id]) = c)
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*/
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strb w0, [x1]
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/* w1++ */
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add x1, x1, #1
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/* p_atf_log_ctrl->atf_except_write_pos_per_cpu[cpu_id] = w1 */
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str x1, [x2]
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exit_putc:
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.endm
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/* -----------------------------------------------------
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* void plat_secondary_cold_boot_setup (void);
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*
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* This function performs any platform specific actions
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* needed for a secondary cpu after a cold reset e.g
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* mark the cpu's presence, mechanism to place it in a
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* holding pen etc.
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* -----------------------------------------------------
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*/
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func plat_secondary_cold_boot_setup
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/* Do not do cold boot for secondary CPU */
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cb_panic:
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b cb_panic
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endfunc plat_secondary_cold_boot_setup
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func platform_is_primary_cpu
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #PLAT_PRIMARY_CPU
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cset x0, eq
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ret
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endfunc platform_is_primary_cpu
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/* ---------------------------------------------
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* int plat_crash_console_init(void)
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* Function to initialize the crash console
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* without a C Runtime to print crash report.
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* Clobber list : x0, x1, x2
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* ---------------------------------------------
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*/
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func plat_crash_console_init
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mov_imm x0, UART0_BASE
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mov_imm x1, UART_CLOCK
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mov_imm x2, UART_BAUDRATE
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b console_init
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ret
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endfunc plat_crash_console_init
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/* ---------------------------------------------
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* int plat_crash_console_putc(void)
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* Function to print a character on the crash
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* console without a C Runtime.
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* Clobber list : x1, x2
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* ---------------------------------------------
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*/
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func plat_crash_console_putc
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mov_imm x1, UART0_BASE
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b console_core_putc
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ret
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endfunc plat_crash_console_putc
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/* ---------------------------------------------
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* void plat_crash_console_flush(int c)
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* Function to force a write of all buffered
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* data that hasn't been output.
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* Out : void.
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* Clobber list : x0, x1
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* ---------------------------------------------
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*/
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func plat_crash_console_flush
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mov_imm x0, UART0_BASE
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b console_core_flush
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endfunc plat_crash_console_flush
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/* --------------------------------------------------------
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* void platform_mem_init (void);
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*
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* Any memory init, relocation to be done before the
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* platform boots. Called very early in the boot process.
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* --------------------------------------------------------
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*/
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func platform_mem_init
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ret
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endfunc platform_mem_init
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