301 lines
7.5 KiB
ArmAsm
301 lines
7.5 KiB
ArmAsm
///*****************************************************************************
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//*
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//* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
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//*
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//* Licensed under the Apache License, Version 2.0 (the "License");
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//* you may not use this file except in compliance with the License.
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//* You may obtain a copy of the License at:
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//*
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//* http://www.apache.org/licenses/LICENSE-2.0
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//*
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//* Unless required by applicable law or agreed to in writing, software
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//* distributed under the License is distributed on an "AS IS" BASIS,
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//* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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//* See the License for the specific language governing permissions and
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//* limitations under the License.
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//*
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//*****************************************************************************/
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///**
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//*******************************************************************************
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//* @file
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//* ihevc_intra_pred_chroma_dc_neon.s
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//*
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//* @brief
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//* contains function definitions for intra prediction dc filtering.
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//* functions are coded using neon intrinsics and can be compiled using
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//* rvct
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//*
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//* @author
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//* yogeswaran rs
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//*
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//* @par list of functions:
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//*
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//*
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//* @remarks
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//* none
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//*
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//*******************************************************************************
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//*/
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///**
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//*******************************************************************************
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//*
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//* @brief
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//* luma intraprediction filter for dc input
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//*
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//* @par description:
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//*
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//* @param[in] pu1_ref
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//* uword8 pointer to the source
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//*
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//* @param[out] pu1_dst
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//* uword8 pointer to the destination
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//*
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//* @param[in] src_strd
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//* integer source stride
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//*
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//* @param[in] dst_strd
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//* integer destination stride
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//*
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//* @param[in] pi1_coeff
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//* word8 pointer to the planar coefficients
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//*
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//* @param[in] nt
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//* size of tranform block
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//*
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//* @param[in] mode
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//* type of filtering
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//*
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//* @returns
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//*
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//* @remarks
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//* none
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//*
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//*******************************************************************************
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//*/
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//void ihevc_intra_pred_chroma_dc(uword8 *pu1_ref,
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// word32 src_strd,
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// uword8 *pu1_dst,
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// word32 dst_strd,
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// word32 nt,
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// word32 mode)
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//
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//**************variables vs registers*****************************************
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//x0 => *pu1_ref
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//x1 => src_strd
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//x2 => *pu1_dst
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//x3 => dst_strd
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//stack contents from #40
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// nt
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// mode
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// pi1_coeff
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.text
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.align 4
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.include "ihevc_neon_macros.s"
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.globl ihevc_intra_pred_chroma_dc_av8
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.type ihevc_intra_pred_chroma_dc_av8, %function
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ihevc_intra_pred_chroma_dc_av8:
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// stmfd sp!, {x4-x12, x14} //stack stores the values of the arguments
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push_v_regs
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stp x19, x20,[sp,#-16]!
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mov x9, #0
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mov v17.s[0], w9
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mov v17.s[1], w9
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clz w5,w4 //counts leading zeros
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add x6, x0, x4,lsl #1 //&src[2nt]
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mov v18.s[0], w9
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mov v18.s[1], w9
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sub x20, x5, #32 //log2nt
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neg x5, x20
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add x7, x0, x4, lsl #2 //&src[4nt]
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mov x12,x5
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add x8, x7, #2 //&src[4nt+2]
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cmp x4, #4
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beq dc_4 //nt=4 loop
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add_loop:
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ld2 {v30.8b, v31.8b}, [x6], #16 //load from src[nt]
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lsl x10,x4,#1 //2nt
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uaddlp v2.4h, v30.8b
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subs x10, x10,#0x10
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ld2 {v26.8b, v27.8b}, [x8],#16 //load from src[2nt+1]
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uaddlp v3.4h, v31.8b
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uaddlp v2.2s, v2.4h
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uaddlp v3.2s, v3.4h
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uadalp v17.1d, v2.2s
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uadalp v18.1d, v3.2s
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uaddlp v2.4h, v26.8b
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uaddlp v3.4h, v27.8b
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uaddlp v2.2s, v2.4h
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uaddlp v3.2s, v3.4h
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uadalp v17.1d, v2.2s
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uadalp v18.1d, v3.2s
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beq epil_add_loop
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core_loop_add:
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ld2 {v30.8b, v31.8b}, [x6],#16 //load from src[nt]
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uaddlp v28.4h, v30.8b
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uaddlp v3.4h, v31.8b
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ld2 {v26.8b, v27.8b}, [x8],#16 //load from src[2nt+1]
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uaddlp v3.2s, v3.4h
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uaddlp v29.2s, v28.4h
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uadalp v18.1d, v3.2s
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uadalp v17.1d, v29.2s
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uaddlp v3.4h, v27.8b
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uaddlp v28.4h, v26.8b
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uaddlp v3.2s, v3.4h
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uaddlp v29.2s, v28.4h
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uadalp v18.1d, v3.2s
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uadalp v17.1d, v29.2s
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epil_add_loop:
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smov x1, v18.s[0]
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smov x11, v17.s[0]
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add x1,x1,x4
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add x11,x11,x4
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lsr x1,x1,x12
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lsr x11,x11,x12
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dup v17.8b,w1
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dup v16.8b,w11
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prologue_cpy_32:
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add x5, x2, x3
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subs x9, x4, #8
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lsl x6, x3, #2
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csel x11, x6, x11,eq
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add x8, x5, x3
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add x10, x8, x3
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beq epilogue_copy
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st2 {v16.8b, v17.8b}, [x2],#16
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sub x6, x6, #16
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st2 {v16.8b, v17.8b}, [x5],#16
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st2 {v16.8b, v17.8b}, [x8],#16
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mov x20,#16
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csel x11, x20, x11,ne
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st2 {v16.8b, v17.8b}, [x10],#16
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st2 {v16.8b, v17.8b}, [x2], x6
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st2 {v16.8b, v17.8b}, [x5], x6
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st2 {v16.8b, v17.8b}, [x8], x6
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st2 {v16.8b, v17.8b}, [x10], x6
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kernel_copy:
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st2 {v16.8b, v17.8b}, [x2],#16
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st2 {v16.8b, v17.8b}, [x5],#16
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st2 {v16.8b, v17.8b}, [x8],#16
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st2 {v16.8b, v17.8b}, [x10],#16
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st2 {v16.8b, v17.8b}, [x2], x6
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st2 {v16.8b, v17.8b}, [x5], x6
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st2 {v16.8b, v17.8b}, [x8], x6
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st2 {v16.8b, v17.8b}, [x10], x6
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st2 {v16.8b, v17.8b}, [x2],#16
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st2 {v16.8b, v17.8b}, [x5],#16
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st2 {v16.8b, v17.8b}, [x8],#16
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st2 {v16.8b, v17.8b}, [x10],#16
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st2 {v16.8b, v17.8b}, [x2], x6
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st2 {v16.8b, v17.8b}, [x5], x6
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st2 {v16.8b, v17.8b}, [x8], x6
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st2 {v16.8b, v17.8b}, [x10], x6
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epilogue_copy:
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st2 {v16.8b, v17.8b}, [x2],x11
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st2 {v16.8b, v17.8b}, [x5],x11
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st2 {v16.8b, v17.8b}, [x8],x11
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st2 {v16.8b, v17.8b}, [x10],x11
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st2 {v16.8b, v17.8b}, [x2]
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st2 {v16.8b, v17.8b}, [x5]
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st2 {v16.8b, v17.8b}, [x8]
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st2 {v16.8b, v17.8b}, [x10]
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b end_func
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dc_4:
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ld2 {v30.8b, v31.8b},[x6] //load from src[nt]
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shl d3, d30,#32
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ld2 {v26.8b, v27.8b},[x8] //load from src[2nt+1]
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shl d2, d31,#32
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uaddlp v3.4h, v3.8b
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uaddlp v2.4h, v2.8b
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uaddlp v3.2s, v3.4h
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uaddlp v2.2s, v2.4h
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uadalp v17.1d, v3.2s
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uadalp v18.1d, v2.2s
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shl d3, d26,#32
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shl d2, d27,#32
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uaddlp v3.4h, v3.8b
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uaddlp v2.4h, v2.8b
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uaddlp v3.2s, v3.4h
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uaddlp v2.2s, v2.4h
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uadalp v17.1d, v3.2s
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uadalp v18.1d, v2.2s
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smov x10, v17.s[0]
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smov x11, v18.s[0]
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add x10,x10,x4
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add x11,x11,x4
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lsr x10,x10,x12
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lsr x11,x11,x12
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orr x10,x10,x11,lsl #8
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dup v0.4h,w10
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st1 {v0.8b},[x2],x3
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st1 {v0.8b},[x2],x3
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st1 {v0.8b},[x2],x3
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st1 {v0.8b},[x2]
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end_func:
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// ldmfd sp!,{x4-x12,x15} //reload the registers from sp
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ldp x19, x20,[sp],#16
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pop_v_regs
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ret
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