375 lines
12 KiB
C
375 lines
12 KiB
C
#ifndef _SDE_DRM_H_
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#define _SDE_DRM_H_
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/*
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* Each top level structure is of the following format:
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*
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* struct {
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* uint64_t version;
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* union {
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* struct version v1;
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* ...
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* } u;
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*
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* Each top level structure maintains independent versioning and is defined
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* as follows:
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*
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* #define STRUCTNAME_V1 0x1
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* ...
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* #define STRUCTNAME_Vn 0x###
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* #define STRUCTNAME_VERSION STRUCTNAME_Vn
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*
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* Version fields should ALWAYS be declared as type uint64_t. This is because
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* 64-bit compilers tend to pad the structure to 64-bit align the start of
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* union structure members. Having an explicit 64-bit version helps to maintain
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* consistent structure layout between 32-bit and 64-bit compilers.
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*
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* Updates to the structures UAPI should always define a new sub-structure to
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* place within the union, and update STRUCTNAME_VERSION to reference the
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* new version number.
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*
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* User mode code should always set the 'version' field to STRUCTNAME_VERSION.
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*/
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/* Total number of supported color planes */
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#define SDE_MAX_PLANES 4
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/* Total number of parameterized detail enhancer mapping curves */
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#define SDE_MAX_DE_CURVES 3
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/* Y/RGB and UV filter configuration */
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#define FILTER_EDGE_DIRECTED_2D 0x0
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#define FILTER_CIRCULAR_2D 0x1
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#define FILTER_SEPARABLE_1D 0x2
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#define FILTER_BILINEAR 0x3
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/* Alpha filters */
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#define FILTER_ALPHA_DROP_REPEAT 0x0
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#define FILTER_ALPHA_BILINEAR 0x1
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#define FILTER_ALPHA_2D 0x3
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/* Blend filters */
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#define FILTER_BLEND_CIRCULAR_2D 0x0
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#define FILTER_BLEND_SEPARABLE_1D 0x1
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/* LUT configuration flags */
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#define SCALER_LUT_SWAP 0x1
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#define SCALER_LUT_DIR_WR 0x2
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#define SCALER_LUT_Y_CIR_WR 0x4
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#define SCALER_LUT_UV_CIR_WR 0x8
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#define SCALER_LUT_Y_SEP_WR 0x10
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#define SCALER_LUT_UV_SEP_WR 0x20
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/**
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* Blend operations for "blend_op" property
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*
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* @SDE_DRM_BLEND_OP_NOT_DEFINED: No blend operation defined for the layer.
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* @SDE_DRM_BLEND_OP_OPAQUE: Apply a constant blend operation. The layer
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* would appear opaque in case fg plane alpha
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* is 0xff.
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* @SDE_DRM_BLEND_OP_PREMULTIPLIED: Apply source over blend rule. Layer already
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* has alpha pre-multiplication done. If the fg
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* plane alpha is less than 0xff, apply
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* modulation as well. This operation is
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* intended on layers having alpha channel.
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* @SDE_DRM_BLEND_OP_COVERAGE: Apply source over blend rule. Layer is not
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* alpha pre-multiplied. Apply
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* pre-multiplication. If fg plane alpha is
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* less than 0xff, apply modulation as well.
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* @SDE_DRM_BLEND_OP_MAX: Used to track maximum blend operation
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* possible by mdp.
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*/
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#define SDE_DRM_BLEND_OP_NOT_DEFINED 0
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#define SDE_DRM_BLEND_OP_OPAQUE 1
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#define SDE_DRM_BLEND_OP_PREMULTIPLIED 2
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#define SDE_DRM_BLEND_OP_COVERAGE 3
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#define SDE_DRM_BLEND_OP_MAX 4
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/**
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* Bit masks for "src_config" property
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* construct bitmask via (1UL << SDE_DRM_<flag>)
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*/
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#define SDE_DRM_DEINTERLACE 0 /* Specifies interlaced input */
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/* DRM bitmasks are restricted to 0..63 */
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#define SDE_DRM_BITMASK_COUNT 64
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/**
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* struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure
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* @num_ext_pxls_lr: Number of total horizontal pixels
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* @num_ext_pxls_tb: Number of total vertical lines
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* @left_ftch: Number of extra pixels to overfetch from left
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* @right_ftch: Number of extra pixels to overfetch from right
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* @top_ftch: Number of extra lines to overfetch from top
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* @btm_ftch: Number of extra lines to overfetch from bottom
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* @left_rpt: Number of extra pixels to repeat from left
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* @right_rpt: Number of extra pixels to repeat from right
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* @top_rpt: Number of extra lines to repeat from top
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* @btm_rpt: Number of extra lines to repeat from bottom
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*/
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struct sde_drm_pix_ext_v1 {
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/*
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* Number of pixels ext in left, right, top and bottom direction
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* for all color components.
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*/
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int32_t num_ext_pxls_lr[SDE_MAX_PLANES];
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int32_t num_ext_pxls_tb[SDE_MAX_PLANES];
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/*
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* Number of pixels needs to be overfetched in left, right, top
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* and bottom directions from source image for scaling.
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*/
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int32_t left_ftch[SDE_MAX_PLANES];
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int32_t right_ftch[SDE_MAX_PLANES];
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int32_t top_ftch[SDE_MAX_PLANES];
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int32_t btm_ftch[SDE_MAX_PLANES];
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/*
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* Number of pixels needs to be repeated in left, right, top and
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* bottom directions for scaling.
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*/
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int32_t left_rpt[SDE_MAX_PLANES];
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int32_t right_rpt[SDE_MAX_PLANES];
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int32_t top_rpt[SDE_MAX_PLANES];
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int32_t btm_rpt[SDE_MAX_PLANES];
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};
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/**
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* Enable mask bits for "scaler" property
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*
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* @SDE_DRM_SCALER_PIX_EXT: pix ext sub-structures are valid
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* @SDE_DRM_SCALER_SCALER_2: scaler 2 sub-structures are valid
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* @SDE_DRM_SCALER_SCALER_3: scaler 3 sub-structures are valid
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* @SDE_DRM_SCALER_DECIMATE: decimation fields are valid
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*/
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#define SDE_DRM_SCALER_PIX_EXT 0x1
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#define SDE_DRM_SCALER_SCALER_2 0x2
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#define SDE_DRM_SCALER_SCALER_3 0x4
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#define SDE_DRM_SCALER_DECIMATE 0x8
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/**
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* struct sde_drm_scaler_v1 - version 1 of struct sde_drm_scaler
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* @lr: Pixel extension settings for left/right
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* @tb: Pixel extension settings for top/botton
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* @init_phase_x: Initial scaler phase values for x
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* @phase_step_x: Phase step values for x
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* @init_phase_y: Initial scaler phase values for y
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* @phase_step_y: Phase step values for y
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* @horz_filter: Horizontal filter array
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* @vert_filter: Vertical filter array
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*/
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struct sde_drm_scaler_v1 {
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/*
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* General definitions
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*/
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uint32_t enable;
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/*
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* Pix ext settings
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*/
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struct sde_drm_pix_ext_v1 pe;
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/*
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* Decimation settings
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*/
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uint32_t horz_decimate;
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uint32_t vert_decimate;
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/*
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* Phase settings
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*/
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int32_t init_phase_x[SDE_MAX_PLANES];
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int32_t phase_step_x[SDE_MAX_PLANES];
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int32_t init_phase_y[SDE_MAX_PLANES];
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int32_t phase_step_y[SDE_MAX_PLANES];
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/*
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* Filter type to be used for scaling in horizontal and vertical
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* directions
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*/
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uint32_t horz_filter[SDE_MAX_PLANES];
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uint32_t vert_filter[SDE_MAX_PLANES];
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};
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/**
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* struct sde_drm_de_v1 - version 1 of detail enhancer structure
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* @enable: Enables/disables detail enhancer
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* @sharpen_level1: Sharpening strength for noise
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* @sharpen_level2: Sharpening strength for context
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* @clip: Clip coefficient
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* @limit: Detail enhancer limit factor
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* @thr_quiet: Quite zone threshold
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* @thr_dieout: Die-out zone threshold
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* @thr_low: Linear zone left threshold
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* @thr_high: Linear zone right threshold
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* @prec_shift: Detail enhancer precision
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* @adjust_a: Mapping curves A coefficients
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* @adjust_b: Mapping curves B coefficients
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* @adjust_c: Mapping curves C coefficients
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*/
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struct sde_drm_de_v1 {
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uint32_t enable;
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int16_t sharpen_level1;
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int16_t sharpen_level2;
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uint16_t clip;
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uint16_t limit;
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uint16_t thr_quiet;
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uint16_t thr_dieout;
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uint16_t thr_low;
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uint16_t thr_high;
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uint16_t prec_shift;
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int16_t adjust_a[SDE_MAX_DE_CURVES];
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int16_t adjust_b[SDE_MAX_DE_CURVES];
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int16_t adjust_c[SDE_MAX_DE_CURVES];
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};
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/**
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* struct sde_drm_scaler_v2 - version 2 of struct sde_drm_scaler
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* @enable: Scaler enable
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* @dir_en: Detail enhancer enable
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* @pe: Pixel extension settings
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* @horz_decimate: Horizontal decimation factor
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* @vert_decimate: Vertical decimation factor
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* @init_phase_x: Initial scaler phase values for x
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* @phase_step_x: Phase step values for x
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* @init_phase_y: Initial scaler phase values for y
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* @phase_step_y: Phase step values for y
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* @preload_x: Horizontal preload value
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* @preload_y: Vertical preload value
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* @src_width: Source width
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* @src_height: Source height
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* @dst_width: Destination width
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* @dst_height: Destination height
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* @y_rgb_filter_cfg: Y/RGB plane filter configuration
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* @uv_filter_cfg: UV plane filter configuration
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* @alpha_filter_cfg: Alpha filter configuration
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* @blend_cfg: Selection of blend coefficients
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* @lut_flag: LUT configuration flags
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* @dir_lut_idx: 2d 4x4 LUT index
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* @y_rgb_cir_lut_idx: Y/RGB circular LUT index
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* @uv_cir_lut_idx: UV circular LUT index
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* @y_rgb_sep_lut_idx: Y/RGB separable LUT index
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* @uv_sep_lut_idx: UV separable LUT index
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* @de: Detail enhancer settings
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*/
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struct sde_drm_scaler_v2 {
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/* General definitions*/
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uint32_t enable;
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uint32_t dir_en;
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/* Pix ext settings*/
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struct sde_drm_pix_ext_v1 pe;
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/* Decimation settings*/
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uint32_t horz_decimate;
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uint32_t vert_decimate;
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/* Phase settings*/
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int32_t init_phase_x[SDE_MAX_PLANES];
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int32_t phase_step_x[SDE_MAX_PLANES];
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int32_t init_phase_y[SDE_MAX_PLANES];
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int32_t phase_step_y[SDE_MAX_PLANES];
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uint32_t preload_x[SDE_MAX_PLANES];
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uint32_t preload_y[SDE_MAX_PLANES];
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uint32_t src_width[SDE_MAX_PLANES];
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uint32_t src_height[SDE_MAX_PLANES];
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uint32_t dst_width;
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uint32_t dst_height;
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uint32_t y_rgb_filter_cfg;
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uint32_t uv_filter_cfg;
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uint32_t alpha_filter_cfg;
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uint32_t blend_cfg;
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uint32_t lut_flag;
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uint32_t dir_lut_idx;
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/* for Y(RGB) and UV planes*/
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uint32_t y_rgb_cir_lut_idx;
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uint32_t uv_cir_lut_idx;
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uint32_t y_rgb_sep_lut_idx;
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uint32_t uv_sep_lut_idx;
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/* Detail enhancer settings */
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struct sde_drm_de_v1 de;
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};
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/* Scaler version definition, see top of file for guidelines */
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#define SDE_DRM_SCALER_V1 0x1
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#define SDE_DRM_SCALER_VERSION SDE_DRM_SCALER_V1
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/**
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* struct sde_drm_scaler - scaler structure
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* @version: Structure version, set to SDE_DRM_SCALER_VERSION
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* @v1: Version 1 of scaler structure
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*/
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struct sde_drm_scaler {
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uint64_t version;
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union {
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struct sde_drm_scaler_v1 v1;
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};
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};
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/*
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* Define constants for struct sde_drm_csc
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*/
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#define SDE_CSC_MATRIX_COEFF_SIZE 9
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#define SDE_CSC_CLAMP_SIZE 6
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#define SDE_CSC_BIAS_SIZE 3
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/* CSC version definition, see top of file for guidelines */
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#define SDE_DRM_CSC_V1 0x1
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#define SDE_DRM_CSC_VERSION SDE_DRM_CSC_V1
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/**
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* struct sde_drm_csc_v1 - version 1 of struct sde_drm_csc
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* @ctm_coeff: Matrix coefficients, in S31.32 format
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* @pre_bias: Pre-bias array values
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* @post_bias: Post-bias array values
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* @pre_clamp: Pre-clamp array values
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* @post_clamp: Post-clamp array values
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*/
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struct sde_drm_csc_v1 {
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int64_t ctm_coeff[SDE_CSC_MATRIX_COEFF_SIZE];
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uint32_t pre_bias[SDE_CSC_BIAS_SIZE];
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uint32_t post_bias[SDE_CSC_BIAS_SIZE];
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uint32_t pre_clamp[SDE_CSC_CLAMP_SIZE];
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uint32_t post_clamp[SDE_CSC_CLAMP_SIZE];
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};
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/**
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* struct sde_drm_csc - CSC configuration structure
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* @version: Structure version, set to SDE_DRM_CSC_VERSION
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* @v1: Version 1 of csc structure
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*/
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struct sde_drm_csc {
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uint64_t version;
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union {
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struct sde_drm_csc_v1 v1;
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};
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};
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/* Writeback Config version definition */
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#define SDE_DRM_WB_CFG 0x1
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/* SDE_DRM_WB_CONFIG_FLAGS - Writeback configuration flags */
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#define SDE_DRM_WB_CFG_FLAGS_CONNECTED (1<<0)
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/**
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* struct sde_drm_wb_cfg - Writeback configuration structure
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* @flags: see DRM_MSM_WB_CONFIG_FLAGS
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* @connector_id: writeback connector identifier
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* @count_modes: Count of modes in modes_ptr
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* @modes: Pointer to struct drm_mode_modeinfo
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*/
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struct sde_drm_wb_cfg {
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uint32_t flags;
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uint32_t connector_id;
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uint32_t count_modes;
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uint64_t modes;
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};
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#endif /* _SDE_DRM_H_ */
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