469 lines
14 KiB
C++
Executable File
469 lines
14 KiB
C++
Executable File
/*
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* Copyright (C) 2015 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ANDROID_DRM_PLANE_H_
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#define ANDROID_DRM_PLANE_H_
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#include "drmcrtc.h"
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#include "drmproperty.h"
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#include <stdint.h>
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#include <xf86drmMode.h>
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#include <vector>
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#include <set>
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namespace android {
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class DrmPlane;
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typedef struct tagPlaneGroup{
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bool bReserved;
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bool bUse;
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uint32_t zpos;
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uint32_t possible_crtcs;
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uint64_t share_id;
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uint64_t win_type;
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int64_t possible_display_=-1;
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//RK3528 延迟使用
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uint32_t delay_use_cnt;
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std::vector<DrmPlane*> planes;
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uint32_t current_crtc_ = 0;
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bool acquire(uint32_t crtc_mask){
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if(bReserved)
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return false;
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if(!(possible_crtcs & crtc_mask))
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return false;
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if(!(current_crtc_ & crtc_mask))
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return false;
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return true;
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}
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bool acquire(uint32_t crtc_mask, int64_t dispaly){
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if(bReserved)
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return false;
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if(!(possible_crtcs & crtc_mask))
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return false;
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if(!(current_crtc_ & crtc_mask))
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return false;
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if(possible_display_ != dispaly)
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return false;
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return true;
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}
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bool set_current_crtc(uint32_t crtc_mask){
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if(!(possible_crtcs & crtc_mask)){
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return false;
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}
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current_crtc_ = crtc_mask;
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return true;
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}
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bool set_current_crtc(uint32_t crtc_mask, int64_t display){
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current_crtc_ = crtc_mask;
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possible_display_ = display;
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return true;
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}
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}PlaneGroup;
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// RK3588
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enum DrmPlaneTypeRK3588{
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// Cluster 0
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PLANE_RK3588_CLUSTER0_WIN0 = 1 << 0,
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PLANE_RK3588_CLUSTER0_WIN1 = 1 << 1,
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// Cluster 1
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PLANE_RK3588_CLUSTER1_WIN0 = 1 << 2,
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PLANE_RK3588_CLUSTER1_WIN1 = 1 << 3,
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// Cluster 2
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PLANE_RK3588_CLUSTER2_WIN0 = 1 << 4,
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PLANE_RK3588_CLUSTER2_WIN1 = 1 << 5,
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// Cluster 3
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PLANE_RK3588_CLUSTER3_WIN0 = 1 << 6,
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PLANE_RK3588_CLUSTER3_WIN1 = 1 << 7,
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// Esmart 0
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PLANE_RK3588_ESMART0_WIN0 = 1 << 8,
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PLANE_RK3588_ESMART0_WIN1 = 1 << 9,
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PLANE_RK3588_ESMART0_WIN2 = 1 << 10,
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PLANE_RK3588_ESMART0_WIN3 = 1 << 11,
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// Esmart 1
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PLANE_RK3588_ESMART1_WIN0 = 1 << 12,
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PLANE_RK3588_ESMART1_WIN1 = 1 << 13,
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PLANE_RK3588_ESMART1_WIN2 = 1 << 14,
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PLANE_RK3588_ESMART1_WIN3 = 1 << 15,
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// Esmart 2
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PLANE_RK3588_ESMART2_WIN0 = 1 << 16,
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PLANE_RK3588_ESMART2_WIN1 = 1 << 17,
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PLANE_RK3588_ESMART2_WIN2 = 1 << 18,
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PLANE_RK3588_ESMART2_WIN3 = 1 << 19,
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// Esmart 3
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PLANE_RK3588_ESMART3_WIN0 = 1 << 20,
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PLANE_RK3588_ESMART3_WIN1 = 1 << 21,
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PLANE_RK3588_ESMART3_WIN2 = 1 << 22,
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PLANE_RK3588_ESMART3_WIN3 = 1 << 23,
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// Cluster mask
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PLANE_RK3588_ALL_CLUSTER0_MASK= 0x3,
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PLANE_RK3588_ALL_CLUSTER1_MASK= 0xc,
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PLANE_RK3588_ALL_CLUSTER2_MASK= 0x30,
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PLANE_RK3588_ALL_CLUSTER3_MASK= 0xc0,
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PLANE_RK3588_ALL_CLUSTER_MASK = 0xff,
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// Esmart mask
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PLANE_RK3588_ALL_ESMART0_MASK = 0xf00,
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PLANE_RK3588_ALL_ESMART1_MASK = 0xf000,
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PLANE_RK3588_ALL_ESMART2_MASK = 0xf0000,
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PLANE_RK3588_ALL_ESMART3_MASK = 0xf00000,
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PLANE_RK3588_ALL_ESMART_MASK = 0xffff00,
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PLANE_RK3588_Unknown = 0xffffffff,
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};
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// Rk356x
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enum DrmPlaneTypeRK356x{
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DRM_PLANE_TYPE_CLUSTER0_WIN0 = 1 << 0,
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DRM_PLANE_TYPE_CLUSTER0_WIN1 = 1 << 1,
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DRM_PLANE_TYPE_CLUSTER1_WIN0 = 1 << 2,
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DRM_PLANE_TYPE_CLUSTER1_WIN1 = 1 << 3,
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DRM_PLANE_TYPE_ESMART0_WIN0 = 1 << 4,
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DRM_PLANE_TYPE_ESMART0_WIN1 = 1 << 5,
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DRM_PLANE_TYPE_ESMART0_WIN2 = 1 << 6,
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DRM_PLANE_TYPE_ESMART0_WIN3 = 1 << 7,
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DRM_PLANE_TYPE_ESMART1_WIN0 = 1 << 8,
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DRM_PLANE_TYPE_ESMART1_WIN1 = 1 << 9,
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DRM_PLANE_TYPE_ESMART1_WIN2 = 1 << 10,
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DRM_PLANE_TYPE_ESMART1_WIN3 = 1 << 11,
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DRM_PLANE_TYPE_SMART0_WIN0 = 1 << 12,
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DRM_PLANE_TYPE_SMART0_WIN1 = 1 << 13,
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DRM_PLANE_TYPE_SMART0_WIN2 = 1 << 14,
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DRM_PLANE_TYPE_SMART0_WIN3 = 1 << 15,
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DRM_PLANE_TYPE_SMART1_WIN0 = 1 << 16,
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DRM_PLANE_TYPE_SMART1_WIN1 = 1 << 17,
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DRM_PLANE_TYPE_SMART1_WIN2 = 1 << 18,
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DRM_PLANE_TYPE_SMART1_WIN3 = 1 << 19,
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DRM_PLANE_TYPE_CLUSTER0_MASK= 0x3,
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DRM_PLANE_TYPE_CLUSTER1_MASK= 0xc,
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DRM_PLANE_TYPE_ESMART0_MASK = 0xf0,
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DRM_PLANE_TYPE_ESMART1_MASK = 0xf00,
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DRM_PLANE_TYPE_SMART0_MASK = 0xf000,
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DRM_PLANE_TYPE_SMART1_MASK = 0xf0000,
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DRM_PLANE_TYPE_ALL_CLUSTER_MASK = 0xf,
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DRM_PLANE_TYPE_ALL_ESMART_MASK = 0xff0,
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DRM_PLANE_TYPE_ALL_SMART_MASK = 0xff000,
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DRM_PLANE_TYPE_VOP2_Unknown = 0xffffffff,
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};
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// RK3528
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enum DrmPlaneTypeRK3528{
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// Esmart 0
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PLANE_RK3528_ESMART0_WIN0 = 1 << 4,
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PLANE_RK3528_ESMART0_WIN1 = 1 << 5,
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PLANE_RK3528_ESMART0_WIN2 = 1 << 6,
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PLANE_RK3528_ESMART0_WIN3 = 1 << 7,
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// Esmart 1
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PLANE_RK3528_ESMART1_WIN0 = 1 << 8,
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PLANE_RK3528_ESMART1_WIN1 = 1 << 9,
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PLANE_RK3528_ESMART1_WIN2 = 1 << 10,
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PLANE_RK3528_ESMART1_WIN3 = 1 << 11,
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// Esmart 2
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PLANE_RK3528_ESMART2_WIN0 = 1 << 12,
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PLANE_RK3528_ESMART2_WIN1 = 1 << 13,
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PLANE_RK3528_ESMART2_WIN2 = 1 << 14,
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PLANE_RK3528_ESMART2_WIN3 = 1 << 15,
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// Esmart 3
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PLANE_RK3528_ESMART3_WIN0 = 1 << 16,
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PLANE_RK3528_ESMART3_WIN1 = 1 << 17,
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PLANE_RK3528_ESMART3_WIN2 = 1 << 18,
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PLANE_RK3528_ESMART3_WIN3 = 1 << 19,
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// Cluster 0
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PLANE_RK3528_CLUSTER0_WIN0 = 1 << 20,
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PLANE_RK3528_CLUSTER0_WIN1 = 1 << 21,
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// Cluster mask
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PLANE_RK3528_ALL_CLUSTER0_MASK= PLANE_RK3528_CLUSTER0_WIN0 | PLANE_RK3528_CLUSTER0_WIN1,
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PLANE_RK3528_ALL_CLUSTER_MASK = PLANE_RK3528_ALL_CLUSTER0_MASK,
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// Esmart mask
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PLANE_RK3528_ALL_ESMART0_MASK = 0xf0,
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PLANE_RK3528_ALL_ESMART1_MASK = 0xf00,
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PLANE_RK3528_ALL_ESMART2_MASK = 0xf000,
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PLANE_RK3528_ALL_ESMART3_MASK = 0xf0000,
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PLANE_RK3528_ALL_ESMART_MASK = 0xffff0,
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PLANE_RK3528_Unknown = 0xffffffff,
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};
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// RK3562
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enum DrmPlaneTypeRK3562{
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// Esmart 0
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PLANE_RK3562_ESMART0_WIN0 = 1 << 0,
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PLANE_RK3562_ESMART0_WIN1 = 1 << 1,
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PLANE_RK3562_ESMART0_WIN2 = 1 << 2,
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PLANE_RK3562_ESMART0_WIN3 = 1 << 3,
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// Esmart 1
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PLANE_RK3562_ESMART1_WIN0 = 1 << 4,
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PLANE_RK3562_ESMART1_WIN1 = 1 << 5,
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PLANE_RK3562_ESMART1_WIN2 = 1 << 6,
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PLANE_RK3562_ESMART1_WIN3 = 1 << 7,
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// Esmart 2
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PLANE_RK3562_ESMART2_WIN0 = 1 << 8,
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PLANE_RK3562_ESMART2_WIN1 = 1 << 9,
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PLANE_RK3562_ESMART2_WIN2 = 1 << 10,
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PLANE_RK3562_ESMART2_WIN3 = 1 << 11,
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// Esmart 3
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PLANE_RK3562_ESMART3_WIN0 = 1 << 12,
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PLANE_RK3562_ESMART3_WIN1 = 1 << 13,
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PLANE_RK3562_ESMART3_WIN2 = 1 << 14,
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PLANE_RK3562_ESMART3_WIN3 = 1 << 15,
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// Esmart mask
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PLANE_RK3562_ALL_ESMART0_MASK = 0xf,
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PLANE_RK3562_ALL_ESMART1_MASK = 0xf0,
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PLANE_RK3562_ALL_ESMART2_MASK = 0xf00,
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PLANE_RK3562_ALL_ESMART3_MASK = 0xf000,
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PLANE_RK3562_ALL_ESMART_MASK = 0xffff,
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PLANE_RK3562_Unknown = 0xffffffff,
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};
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// RK3399/Rk3288/RK3328/RK3128
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enum DrmPlaneTypeRK3399{
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DRM_PLANE_TYPE_VOP0_WIN0 = 1 << 0,
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DRM_PLANE_TYPE_VOP0_WIN1 = 1 << 1,
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DRM_PLANE_TYPE_VOP0_WIN2_0 = 1 << 2,
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DRM_PLANE_TYPE_VOP0_WIN2_1 = 1 << 3,
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DRM_PLANE_TYPE_VOP0_WIN2_2 = 1 << 4,
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DRM_PLANE_TYPE_VOP0_WIN2_3 = 1 << 5,
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DRM_PLANE_TYPE_VOP0_WIN3_0 = 1 << 6,
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DRM_PLANE_TYPE_VOP0_WIN3_1 = 1 << 7,
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DRM_PLANE_TYPE_VOP0_WIN3_2 = 1 << 8,
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DRM_PLANE_TYPE_VOP0_WIN3_3 = 1 << 9,
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DRM_PLANE_TYPE_VOP1_WIN0 = 1 << 10,
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DRM_PLANE_TYPE_VOP1_WIN2_0 = 1 << 11,
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DRM_PLANE_TYPE_VOP1_WIN2_1 = 1 << 12,
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DRM_PLANE_TYPE_VOP1_WIN2_2 = 1 << 13,
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DRM_PLANE_TYPE_VOP1_WIN2_3 = 1 << 14,
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DRM_PLANE_TYPE_VOP0_MASK = 0x3ff,
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DRM_PLANE_TYPE_VOP1_MASK = 0x7c,
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DRM_PLANE_TYPE_VOP1_Unknown = 0xffffffff,
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};
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enum DrmPlaneRotationType{
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DRM_PLANE_ROTATION_0 = 1 << 0,
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DRM_PLANE_ROTATION_90 = 1 << 1,
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DRM_PLANE_ROTATION_270 = 1 << 2,
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DRM_PLANE_ROTATION_X_MIRROR = 1 << 3,
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DRM_PLANE_ROTATION_Y_MIRROR = 1 << 4,
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DRM_PLANE_ROTATION_Unknown = 0xff,
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};
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struct plane_rotation_type_name {
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DrmPlaneRotationType type;
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const char *name;
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};
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enum DrmPlaneFeatureType{
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DRM_PLANE_FEARURE_SCALE = 0,
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DRM_PLANE_FEARURE_ALPHA = 1,
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DRM_PLANE_FEARURE_HDR2SDR = 2,
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DRM_PLANE_FEARURE_SDR2HDR = 3,
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DRM_PLANE_FEARURE_AFBDC = 4,
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};
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enum DrmPlaneFeatureTypeBit{
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DRM_PLANE_FEARURE_BIT_SCALE = 1 << DRM_PLANE_FEARURE_SCALE,
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DRM_PLANE_FEARURE_BIT_ALPHA = 1 << DRM_PLANE_FEARURE_ALPHA,
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DRM_PLANE_FEARURE_BIT_HDR2SDR = 1 << DRM_PLANE_FEARURE_HDR2SDR,
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DRM_PLANE_FEARURE_BIT_SDR2HDR = 1 << DRM_PLANE_FEARURE_SDR2HDR,
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DRM_PLANE_FEARURE_BIT_AFBDC = 1 << DRM_PLANE_FEARURE_AFBDC,
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};
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enum vop_next_hdr_layer_type {
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COMMON_LAYER = 0,
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NEXT_HDR_BASE_LAYER = 1,
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NEXT_HDR_ENHANCE_LAYER = 2,
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};
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class DrmDevice;
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class DrmPlane {
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public:
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DrmPlane(DrmDevice *drm, drmModePlanePtr p, int soc_id);
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DrmPlane(const DrmPlane &) = delete;
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DrmPlane &operator=(const DrmPlane &) = delete;
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int Init();
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uint32_t id() const;
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bool GetCrtcSupported(const DrmCrtc &crtc) const;
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uint32_t type() const;
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uint64_t win_type() const;
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const char* name() const;
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void mark_type_by_name();
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const DrmProperty &crtc_property() const;
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const DrmProperty &fb_property() const;
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const DrmProperty &crtc_x_property() const;
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const DrmProperty &crtc_y_property() const;
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const DrmProperty &crtc_w_property() const;
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const DrmProperty &crtc_h_property() const;
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const DrmProperty &src_x_property() const;
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const DrmProperty &src_y_property() const;
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const DrmProperty &src_w_property() const;
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const DrmProperty &src_h_property() const;
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const DrmProperty &zpos_property() const;
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const DrmProperty &rotation_property() const;
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const DrmProperty &alpha_property() const;
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const DrmProperty &eotf_property() const;
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const DrmProperty &blend_property() const;
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const DrmProperty &colorspace_property() const;
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const DrmProperty &area_id_property() const;
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const DrmProperty &share_id_property() const;
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const DrmProperty &feature_property() const;
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const DrmProperty &name_property() const;
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const DrmProperty &input_w_property() const;
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const DrmProperty &input_h_property() const;
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const DrmProperty &output_w_property() const;
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const DrmProperty &output_h_property() const;
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const DrmProperty &scale_rate_property() const;
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const DrmProperty &async_commit_property() const;
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const DrmProperty &kernel6_1_color_encoding() const;
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const DrmProperty &kernel6_1_color_range() const;
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bool is_use();
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void set_use(bool b_use);
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bool get_scale();
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bool get_rotate();
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bool get_hdr2sdr();
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bool get_sdr2hdr();
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bool get_afbc();
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bool get_yuv();
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int get_input_w_max();
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int get_input_h_max();
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int get_output_w_max();
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int get_output_h_max();
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int get_transform();
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void set_yuv(bool b_yuv);
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bool is_reserved();
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void set_reserved(bool bReserved);
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bool is_support_scale(float scale_rate);
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bool is_support_input(int input_w, int input_h);
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bool is_support_output(int output_w, int output_h);
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bool is_support_format(uint32_t format, bool afbcd);
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bool is_support_transform(int transform);
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inline uint32_t get_possible_crtc_mask() const{ return possible_crtc_mask_; }
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inline void set_current_crtc_bit(uint32_t current_crtc) { current_crtc_ = current_crtc;}
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inline uint32_t get_current_crtc_bit() const{ return current_crtc_; }
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// 8K
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int get_input_w_max_8k();
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int get_input_h_max_8k();
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int get_output_w_max_8k();
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int get_output_h_max_8k();
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bool is_support_input_8k(int input_w, int input_h);
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bool is_support_output_8k(int output_w, int output_h);
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int get_transform_8k();
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bool is_support_transform_8k(int transform);
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bool is_support_scale_8k(float scale_rate);
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private:
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DrmDevice *drm_;
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uint32_t id_;
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uint32_t possible_crtc_mask_;
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uint32_t current_crtc_;
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uint32_t type_;
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DrmProperty crtc_property_;
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DrmProperty fb_property_;
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DrmProperty crtc_x_property_;
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DrmProperty crtc_y_property_;
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DrmProperty crtc_w_property_;
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DrmProperty crtc_h_property_;
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DrmProperty src_x_property_;
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DrmProperty src_y_property_;
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DrmProperty src_w_property_;
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DrmProperty src_h_property_;
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DrmProperty rotation_property_;
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DrmProperty alpha_property_;
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DrmProperty blend_mode_property_;
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DrmProperty zpos_property_;
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//RK support
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DrmProperty eotf_property_;
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DrmProperty colorspace_property_;
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DrmProperty area_id_property_;
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DrmProperty share_id_property_;
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DrmProperty feature_property_;
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DrmProperty name_property_;
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DrmProperty input_w_property_;
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DrmProperty input_h_property_;
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DrmProperty output_w_property_;
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DrmProperty output_h_property_;
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DrmProperty scale_rate_property_;
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DrmProperty async_commit_property_;
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DrmProperty kernel6_1_color_encoding_;
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DrmProperty kernel6_1_color_range_;
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// next hdr
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DrmProperty next_hdr_layer_type_property_;
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bool bReserved_;
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bool b_use_;
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bool b_yuv_;
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bool b_scale_;
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bool b_alpha_;
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bool b_hdr2sdr_;
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bool b_sdr2hdr_;
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bool b_afbdc_;
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bool b_afbc_prop_;
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uint64_t win_type_;
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const char *name_;
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uint32_t rotate_=0;
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int input_w_max_;
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int input_h_max_;
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int output_w_max_;
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int output_h_max_;
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float scale_min_=0.0;
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float scale_max_=0.0;
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std::set<uint32_t> support_format_list;
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drmModePlanePtr plane_;
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int soc_id_;
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};
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} // namespace android
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#endif // ANDROID_DRM_PLANE_H_
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