118 lines
3.4 KiB
C
118 lines
3.4 KiB
C
/*
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* Copyright (c) 2017 Rockchip Electronics Co. Ltd.
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*
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* Base on code in drivers/clk/clk-divider.c.
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* See clk-divider.c for further copyright information.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "clk-regmap.h"
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#define div_mask(width) ((1 << (width)) - 1)
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#define to_clk_regmap_divider(_hw) \
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container_of(_hw, struct clk_regmap_divider, hw)
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static unsigned long
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clk_regmap_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
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{
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struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
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unsigned int val, div;
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regmap_read(divider->regmap, divider->reg, &val);
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div = val >> divider->shift;
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div &= div_mask(divider->width);
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return divider_recalc_rate(hw, parent_rate, div, NULL,
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CLK_DIVIDER_ROUND_CLOSEST, divider->width);
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}
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static long
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clk_regmap_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
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return divider_round_rate(hw, rate, prate, NULL, divider->width,
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CLK_DIVIDER_ROUND_CLOSEST);
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}
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static int div_round_closest(unsigned long parent_rate, unsigned long rate)
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{
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int up, down;
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unsigned long up_rate, down_rate;
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up = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
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down = parent_rate / rate;
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up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up);
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down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down);
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return (rate - up_rate) <= (down_rate - rate) ? up : down;
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}
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static int
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clk_regmap_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_regmap_divider *divider = to_clk_regmap_divider(hw);
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u32 val, div;
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div = div_round_closest(parent_rate, rate);
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dev_dbg(divider->dev, "%s: parent_rate=%ld, div=%d, rate=%ld\n",
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clk_hw_get_name(hw), parent_rate, div, rate);
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val = div_mask(divider->width) << (divider->shift + 16);
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val |= (div - 1) << divider->shift;
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return regmap_write(divider->regmap, divider->reg, val);
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}
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const struct clk_ops clk_regmap_divider_ops = {
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.recalc_rate = clk_regmap_divider_recalc_rate,
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.round_rate = clk_regmap_divider_round_rate,
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.set_rate = clk_regmap_divider_set_rate,
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};
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EXPORT_SYMBOL_GPL(clk_regmap_divider_ops);
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struct clk *
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devm_clk_regmap_register_divider(struct device *dev, const char *name,
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const char *parent_name, struct regmap *regmap,
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u32 reg, u8 shift, u8 width,
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unsigned long flags)
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{
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struct clk_regmap_divider *divider;
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struct clk_init_data init = {};
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divider = devm_kzalloc(dev, sizeof(*divider), GFP_KERNEL);
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if (!divider)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_regmap_divider_ops;
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init.flags = flags;
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init.parent_names = (parent_name ? &parent_name : NULL);
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init.num_parents = (parent_name ? 1 : 0);
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divider->dev = dev;
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divider->regmap = regmap;
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divider->reg = reg;
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divider->shift = shift;
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divider->width = width;
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divider->hw.init = &init;
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return devm_clk_register(dev, ÷r->hw);
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}
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EXPORT_SYMBOL_GPL(devm_clk_regmap_register_divider);
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