232 lines
6.7 KiB
C
232 lines
6.7 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef _UAPI_EXYNOS_DRM_H_
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#define _UAPI_EXYNOS_DRM_H_
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#include "drm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct drm_exynos_gem_create {
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__u64 size;
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__u32 flags;
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__u32 handle;
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};
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struct drm_exynos_gem_map {
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__u32 handle;
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__u32 reserved;
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__u64 offset;
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};
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struct drm_exynos_gem_info {
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__u32 handle;
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__u32 flags;
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__u64 size;
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};
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struct drm_exynos_vidi_connection {
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__u32 connection;
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__u32 extensions;
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__u64 edid;
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};
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enum e_drm_exynos_gem_mem_type {
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EXYNOS_BO_CONTIG = 0 << 0,
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EXYNOS_BO_NONCONTIG = 1 << 0,
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EXYNOS_BO_NONCACHABLE = 0 << 1,
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EXYNOS_BO_CACHABLE = 1 << 1,
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EXYNOS_BO_WC = 1 << 2,
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EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE | EXYNOS_BO_WC
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};
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struct drm_exynos_g2d_get_ver {
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__u32 major;
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__u32 minor;
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};
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struct drm_exynos_g2d_cmd {
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__u32 offset;
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__u32 data;
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};
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enum drm_exynos_g2d_buf_type {
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G2D_BUF_USERPTR = 1 << 31,
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};
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enum drm_exynos_g2d_event_type {
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G2D_EVENT_NOT,
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G2D_EVENT_NONSTOP,
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G2D_EVENT_STOP,
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};
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struct drm_exynos_g2d_userptr {
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unsigned long userptr;
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unsigned long size;
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};
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struct drm_exynos_g2d_set_cmdlist {
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__u64 cmd;
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__u64 cmd_buf;
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__u32 cmd_nr;
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__u32 cmd_buf_nr;
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__u64 event_type;
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__u64 user_data;
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};
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struct drm_exynos_g2d_exec {
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__u64 async;
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};
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struct drm_exynos_ioctl_ipp_get_res {
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__u32 count_ipps;
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__u32 reserved;
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__u64 ipp_id_ptr;
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};
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enum drm_exynos_ipp_format_type {
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DRM_EXYNOS_IPP_FORMAT_SOURCE = 0x01,
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DRM_EXYNOS_IPP_FORMAT_DESTINATION = 0x02,
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};
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struct drm_exynos_ipp_format {
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__u32 fourcc;
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__u32 type;
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__u64 modifier;
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};
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enum drm_exynos_ipp_capability {
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DRM_EXYNOS_IPP_CAP_CROP = 0x01,
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DRM_EXYNOS_IPP_CAP_ROTATE = 0x02,
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DRM_EXYNOS_IPP_CAP_SCALE = 0x04,
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DRM_EXYNOS_IPP_CAP_CONVERT = 0x08,
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};
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struct drm_exynos_ioctl_ipp_get_caps {
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__u32 ipp_id;
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__u32 capabilities;
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__u32 reserved;
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__u32 formats_count;
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__u64 formats_ptr;
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};
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enum drm_exynos_ipp_limit_type {
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DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE = 0x0001,
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DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE = 0x0002,
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DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER = 0x0001 << 16,
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DRM_EXYNOS_IPP_LIMIT_SIZE_AREA = 0x0002 << 16,
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DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED = 0x0003 << 16,
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DRM_EXYNOS_IPP_LIMIT_TYPE_MASK = 0x000f,
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DRM_EXYNOS_IPP_LIMIT_SIZE_MASK = 0x000f << 16,
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};
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struct drm_exynos_ipp_limit_val {
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__u32 min;
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__u32 max;
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__u32 align;
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__u32 reserved;
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};
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struct drm_exynos_ipp_limit {
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__u32 type;
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__u32 reserved;
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struct drm_exynos_ipp_limit_val h;
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struct drm_exynos_ipp_limit_val v;
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};
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struct drm_exynos_ioctl_ipp_get_limits {
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__u32 ipp_id;
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__u32 fourcc;
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__u64 modifier;
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__u32 type;
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__u32 limits_count;
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__u64 limits_ptr;
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};
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enum drm_exynos_ipp_task_id {
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DRM_EXYNOS_IPP_TASK_BUFFER = 0x0001,
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DRM_EXYNOS_IPP_TASK_RECTANGLE = 0x0002,
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DRM_EXYNOS_IPP_TASK_TRANSFORM = 0x0003,
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DRM_EXYNOS_IPP_TASK_ALPHA = 0x0004,
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DRM_EXYNOS_IPP_TASK_TYPE_SOURCE = 0x0001 << 16,
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DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION = 0x0002 << 16,
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};
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struct drm_exynos_ipp_task_buffer {
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__u32 id;
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__u32 fourcc;
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__u32 width, height;
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__u32 gem_id[4];
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__u32 offset[4];
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__u32 pitch[4];
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__u64 modifier;
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};
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struct drm_exynos_ipp_task_rect {
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__u32 id;
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__u32 reserved;
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__u32 x;
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__u32 y;
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__u32 w;
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__u32 h;
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};
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struct drm_exynos_ipp_task_transform {
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__u32 id;
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__u32 rotation;
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};
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struct drm_exynos_ipp_task_alpha {
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__u32 id;
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__u32 value;
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};
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enum drm_exynos_ipp_flag {
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DRM_EXYNOS_IPP_FLAG_EVENT = 0x01,
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DRM_EXYNOS_IPP_FLAG_TEST_ONLY = 0x02,
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DRM_EXYNOS_IPP_FLAG_NONBLOCK = 0x04,
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};
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#define DRM_EXYNOS_IPP_FLAGS (DRM_EXYNOS_IPP_FLAG_EVENT | DRM_EXYNOS_IPP_FLAG_TEST_ONLY | DRM_EXYNOS_IPP_FLAG_NONBLOCK)
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struct drm_exynos_ioctl_ipp_commit {
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__u32 ipp_id;
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__u32 flags;
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__u32 reserved;
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__u32 params_size;
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__u64 params_ptr;
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__u64 user_data;
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};
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#define DRM_EXYNOS_GEM_CREATE 0x00
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#define DRM_EXYNOS_GEM_MAP 0x01
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#define DRM_EXYNOS_GEM_GET 0x04
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#define DRM_EXYNOS_VIDI_CONNECTION 0x07
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#define DRM_EXYNOS_G2D_GET_VER 0x20
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#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
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#define DRM_EXYNOS_G2D_EXEC 0x22
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#define DRM_EXYNOS_IPP_GET_RESOURCES 0x40
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#define DRM_EXYNOS_IPP_GET_CAPS 0x41
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#define DRM_EXYNOS_IPP_GET_LIMITS 0x42
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#define DRM_EXYNOS_IPP_COMMIT 0x43
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#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
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#define DRM_IOCTL_EXYNOS_GEM_MAP DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_GEM_MAP, struct drm_exynos_gem_map)
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#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
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#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
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#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
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#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
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#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
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#define DRM_IOCTL_EXYNOS_IPP_GET_RESOURCES DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_IPP_GET_RESOURCES, struct drm_exynos_ioctl_ipp_get_res)
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#define DRM_IOCTL_EXYNOS_IPP_GET_CAPS DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_IPP_GET_CAPS, struct drm_exynos_ioctl_ipp_get_caps)
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#define DRM_IOCTL_EXYNOS_IPP_GET_LIMITS DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_IPP_GET_LIMITS, struct drm_exynos_ioctl_ipp_get_limits)
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#define DRM_IOCTL_EXYNOS_IPP_COMMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_EXYNOS_IPP_COMMIT, struct drm_exynos_ioctl_ipp_commit)
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#define DRM_EXYNOS_G2D_EVENT 0x80000000
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#define DRM_EXYNOS_IPP_EVENT 0x80000002
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struct drm_exynos_g2d_event {
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struct drm_event base;
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__u64 user_data;
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__u32 tv_sec;
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__u32 tv_usec;
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__u32 cmdlist_no;
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__u32 reserved;
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};
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struct drm_exynos_ipp_event {
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struct drm_event base;
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__u64 user_data;
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__u32 tv_sec;
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__u32 tv_usec;
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__u32 ipp_id;
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__u32 sequence;
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__u64 reserved;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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