84 lines
3.0 KiB
C
84 lines
3.0 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef MLX5_USER_IOCTL_VERBS_H
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#define MLX5_USER_IOCTL_VERBS_H
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#include <linux/types.h>
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enum mlx5_ib_uapi_flow_action_flags {
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MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0,
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};
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enum mlx5_ib_uapi_flow_table_type {
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MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0,
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MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1,
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MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB = 0x2,
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MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX = 0x3,
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MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_TX = 0x4,
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};
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enum mlx5_ib_uapi_flow_action_packet_reformat_type {
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MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 = 0x0,
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MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x1,
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MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x2,
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MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x3,
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};
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struct mlx5_ib_uapi_devx_async_cmd_hdr {
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__aligned_u64 wr_id;
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__u8 out_data[];
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};
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enum mlx5_ib_uapi_dm_type {
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MLX5_IB_UAPI_DM_TYPE_MEMIC,
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MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
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MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
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};
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enum mlx5_ib_uapi_devx_create_event_channel_flags {
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MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA = 1 << 0,
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};
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struct mlx5_ib_uapi_devx_async_event_hdr {
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__aligned_u64 cookie;
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__u8 out_data[];
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};
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enum mlx5_ib_uapi_pp_alloc_flags {
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MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX = 1 << 0,
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};
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enum mlx5_ib_uapi_uar_alloc_type {
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MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF = 0x0,
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MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC = 0x1,
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};
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enum mlx5_ib_uapi_query_port_flags {
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MLX5_IB_UAPI_QUERY_PORT_VPORT = 1 << 0,
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MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID = 1 << 1,
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MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX = 1 << 2,
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MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX = 1 << 3,
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MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0 = 1 << 4,
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MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID = 1 << 5,
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};
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struct mlx5_ib_uapi_reg {
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__u32 value;
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__u32 mask;
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};
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struct mlx5_ib_uapi_query_port {
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__aligned_u64 flags;
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__u16 vport;
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__u16 vport_vhca_id;
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__u16 esw_owner_vhca_id;
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__u16 rsvd0;
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__aligned_u64 vport_steering_icm_rx;
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__aligned_u64 vport_steering_icm_tx;
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struct mlx5_ib_uapi_reg reg_c0;
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};
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#endif
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