113 lines
3.0 KiB
C
113 lines
3.0 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __QEDR_USER_H__
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#define __QEDR_USER_H__
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#include <linux/types.h>
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#define QEDR_ABI_VERSION (8)
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enum qedr_alloc_ucontext_flags {
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QEDR_ALLOC_UCTX_EDPM_MODE = 1 << 0,
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QEDR_ALLOC_UCTX_DB_REC = 1 << 1,
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QEDR_SUPPORT_DPM_SIZES = 1 << 2,
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};
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struct qedr_alloc_ucontext_req {
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__u32 context_flags;
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__u32 reserved;
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};
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#define QEDR_LDPM_MAX_SIZE (8192)
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#define QEDR_EDPM_TRANS_SIZE (64)
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#define QEDR_EDPM_MAX_SIZE (ROCE_REQ_MAX_INLINE_DATA_SIZE)
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enum qedr_rdma_dpm_type {
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QEDR_DPM_TYPE_NONE = 0,
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QEDR_DPM_TYPE_ROCE_ENHANCED = 1 << 0,
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QEDR_DPM_TYPE_ROCE_LEGACY = 1 << 1,
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QEDR_DPM_TYPE_IWARP_LEGACY = 1 << 2,
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QEDR_DPM_TYPE_ROCE_EDPM_MODE = 1 << 3,
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QEDR_DPM_SIZES_SET = 1 << 4,
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};
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struct qedr_alloc_ucontext_resp {
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__aligned_u64 db_pa;
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__u32 db_size;
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__u32 max_send_wr;
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__u32 max_recv_wr;
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__u32 max_srq_wr;
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__u32 sges_per_send_wr;
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__u32 sges_per_recv_wr;
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__u32 sges_per_srq_wr;
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__u32 max_cqes;
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__u8 dpm_flags;
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__u8 wids_enabled;
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__u16 wid_count;
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__u16 ldpm_limit_size;
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__u8 edpm_trans_size;
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__u8 reserved;
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__u16 edpm_limit_size;
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__u8 padding[6];
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};
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struct qedr_alloc_pd_ureq {
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__aligned_u64 rsvd1;
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};
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struct qedr_alloc_pd_uresp {
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__u32 pd_id;
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__u32 reserved;
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};
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struct qedr_create_cq_ureq {
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__aligned_u64 addr;
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__aligned_u64 len;
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};
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struct qedr_create_cq_uresp {
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__u32 db_offset;
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__u16 icid;
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__u16 reserved;
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__aligned_u64 db_rec_addr;
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};
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struct qedr_create_qp_ureq {
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__u32 qp_handle_hi;
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__u32 qp_handle_lo;
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__aligned_u64 sq_addr;
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__aligned_u64 sq_len;
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__aligned_u64 rq_addr;
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__aligned_u64 rq_len;
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};
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struct qedr_create_qp_uresp {
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__u32 qp_id;
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__u32 atomic_supported;
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__u32 sq_db_offset;
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__u16 sq_icid;
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__u32 rq_db_offset;
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__u16 rq_icid;
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__u32 rq_db2_offset;
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__u32 reserved;
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__aligned_u64 sq_db_rec_addr;
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__aligned_u64 rq_db_rec_addr;
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};
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struct qedr_create_srq_ureq {
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__aligned_u64 prod_pair_addr;
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__aligned_u64 srq_addr;
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__aligned_u64 srq_len;
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};
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struct qedr_create_srq_uresp {
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__u16 srq_id;
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__u16 reserved0;
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__u32 reserved1;
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};
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struct qedr_user_db_rec {
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__aligned_u64 db_data;
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};
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#endif
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