84 lines
3.4 KiB
C
84 lines
3.4 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __SND_AR_TOKENS_H__
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#define __SND_AR_TOKENS_H__
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#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1
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#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2
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#define APM_SUB_GRAPH_DIRECTION_TX 0x1
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#define APM_SUB_GRAPH_DIRECTION_RX 0x2
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#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1
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#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2
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#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3
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#define APM_CONTAINER_CAP_ID_PP 0x1
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#define APM_CONTAINER_CAP_ID_CD 0x2
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#define APM_CONTAINER_CAP_ID_EP 0x3
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#define APM_CONTAINER_CAP_ID_OLC 0x4
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#define APM_CONT_GRAPH_POS_STREAM 0x1
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#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2
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#define APM_CONT_GRAPH_POS_STR_DEV 0x3
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#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4
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#define APM_PROC_DOMAIN_ID_MDSP 0x1
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#define APM_PROC_DOMAIN_ID_ADSP 0x2
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#define APM_PROC_DOMAIN_ID_SDSP 0x4
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#define APM_PROC_DOMAIN_ID_CDSP 0x5
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#define PCM_INTERLEAVED 1
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#define PCM_DEINTERLEAVED_PACKED 2
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#define PCM_DEINTERLEAVED_UNPACKED 3
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#define AR_I2S_WS_SRC_EXTERNAL 0
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#define AR_I2S_WS_SRC_INTERNAL 1
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enum ar_event_types {
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AR_EVENT_NONE = 0,
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AR_PGA_DAPM_EVENT
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};
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#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256
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#define SND_SOC_AR_TPLG_VOL_CTL 257
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#define AR_TKN_DAI_INDEX 1
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#define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2
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#define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3
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#define AR_TKN_U32_SUB_GRAPH_DIRECTION 4
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#define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5
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#define AR_TKN_U32_CONTAINER_INSTANCE_ID 100
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#define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101
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#define AR_TKN_U32_CONTAINER_STACK_SIZE 102
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#define AR_TKN_U32_CONTAINER_GRAPH_POS 103
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#define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104
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#define AR_TKN_U32_MODULE_ID 200
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#define AR_TKN_U32_MODULE_INSTANCE_ID 201
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#define AR_TKN_U32_MODULE_MAX_IP_PORTS 202
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#define AR_TKN_U32_MODULE_MAX_OP_PORTS 203
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#define AR_TKN_U32_MODULE_IN_PORTS 204
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#define AR_TKN_U32_MODULE_OUT_PORTS 205
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#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206
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#define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207
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#define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208
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#define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209
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#define AR_TKN_U32_MODULE_HW_IF_IDX 250
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#define AR_TKN_U32_MODULE_HW_IF_TYPE 251
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#define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252
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#define AR_TKN_U32_MODULE_FMT_DATA 253
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#define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254
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#define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255
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#define AR_TKN_U32_MODULE_SD_LINE_IDX 256
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#define AR_TKN_U32_MODULE_WS_SRC 257
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#define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258
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#define AR_TKN_U32_MODULE_LOG_CODE 259
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#define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260
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#define AR_TKN_U32_MODULE_LOG_MODE 261
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#endif
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