30 lines
1.3 KiB
LLVM
30 lines
1.3 KiB
LLVM
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN %s
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;GCN-LABEL: {{^}}v_interp:
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;GCN-NOT: s_wqm
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;GCN: s_mov_b32 m0, s{{[0-9]+}}
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;GCN: v_interp_p1_f32
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;GCN: v_interp_p2_f32
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define amdgpu_ps void @v_interp(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>) {
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main_body:
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%i = extractelement <2 x i32> %4, i32 0
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%j = extractelement <2 x i32> %4, i32 1
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%p0_0 = call float @llvm.amdgcn.interp.p1(i32 %i, i32 0, i32 0, i32 %3)
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%p1_0 = call float @llvm.amdgcn.interp.p2(float %p0_0, i32 %j, i32 0, i32 0, i32 %3)
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%p0_1 = call float @llvm.amdgcn.interp.p1(i32 %i, i32 1, i32 0, i32 %3)
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%p1_1 = call float @llvm.amdgcn.interp.p2(float %p0_1, i32 %j, i32 1, i32 0, i32 %3)
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %p0_0, float %p0_0, float %p1_1, float %p1_1)
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ret void
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}
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; Function Attrs: nounwind readnone
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declare float @llvm.amdgcn.interp.p1(i32, i32, i32, i32) #0
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; Function Attrs: nounwind readnone
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declare float @llvm.amdgcn.interp.p2(float, i32, i32, i32, i32) #0
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { nounwind readnone }
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