216 lines
9.7 KiB
LLVM
216 lines
9.7 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare float @llvm.fabs.f32(float) #0
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; FUNC-LABEL: {{^}}mad_sub_f32:
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; SI: buffer_load_dword [[REGA:v[0-9]+]]
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; SI: buffer_load_dword [[REGB:v[0-9]+]]
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; SI: buffer_load_dword [[REGC:v[0-9]+]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], [[REGA]], [[REGB]], -[[REGC]]
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; SI: buffer_store_dword [[RESULT]]
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define void @mad_sub_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%mul = fmul float %a, %b
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%sub = fsub float %mul, %c
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}mad_sub_inv_f32:
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; SI: buffer_load_dword [[REGA:v[0-9]+]]
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; SI: buffer_load_dword [[REGB:v[0-9]+]]
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; SI: buffer_load_dword [[REGC:v[0-9]+]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], -[[REGA]], [[REGB]], [[REGC]]
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; SI: buffer_store_dword [[RESULT]]
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define void @mad_sub_inv_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%mul = fmul float %a, %b
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%sub = fsub float %c, %mul
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}mad_sub_f64:
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; SI: v_mul_f64
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; SI: v_add_f64
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define void @mad_sub_f64(double addrspace(1)* noalias nocapture %out, double addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr double, double addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr double, double addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr double, double addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr double, double addrspace(1)* %out, i64 %tid.ext
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%a = load volatile double, double addrspace(1)* %gep0, align 8
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%b = load volatile double, double addrspace(1)* %gep1, align 8
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%c = load volatile double, double addrspace(1)* %gep2, align 8
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%mul = fmul double %a, %b
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%sub = fsub double %mul, %c
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store double %sub, double addrspace(1)* %outgep, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}mad_sub_fabs_f32:
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; SI: buffer_load_dword [[REGA:v[0-9]+]]
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; SI: buffer_load_dword [[REGB:v[0-9]+]]
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; SI: buffer_load_dword [[REGC:v[0-9]+]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], [[REGA]], [[REGB]], -|[[REGC]]|
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; SI: buffer_store_dword [[RESULT]]
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define void @mad_sub_fabs_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%c.abs = call float @llvm.fabs.f32(float %c) #0
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%mul = fmul float %a, %b
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%sub = fsub float %mul, %c.abs
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}mad_sub_fabs_inv_f32:
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; SI: buffer_load_dword [[REGA:v[0-9]+]]
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; SI: buffer_load_dword [[REGB:v[0-9]+]]
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; SI: buffer_load_dword [[REGC:v[0-9]+]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], -[[REGA]], [[REGB]], |[[REGC]]|
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; SI: buffer_store_dword [[RESULT]]
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define void @mad_sub_fabs_inv_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%c.abs = call float @llvm.fabs.f32(float %c) #0
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%mul = fmul float %a, %b
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%sub = fsub float %c.abs, %mul
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}neg_neg_mad_f32:
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; SI: v_mac_f32_e32 {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}
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define void @neg_neg_mad_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%nega = fsub float -0.000000e+00, %a
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%negb = fsub float -0.000000e+00, %b
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%mul = fmul float %nega, %negb
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%sub = fadd float %mul, %c
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}mad_fabs_sub_f32:
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; SI: buffer_load_dword [[REGA:v[0-9]+]]
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; SI: buffer_load_dword [[REGB:v[0-9]+]]
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; SI: buffer_load_dword [[REGC:v[0-9]+]]
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], [[REGA]], |[[REGB]]|, -[[REGC]]
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; SI: buffer_store_dword [[RESULT]]
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define void @mad_fabs_sub_f32(float addrspace(1)* noalias nocapture %out, float addrspace(1)* noalias nocapture readonly %ptr) #1 {
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%tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0
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%tid.ext = sext i32 %tid to i64
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%gep0 = getelementptr float, float addrspace(1)* %ptr, i64 %tid.ext
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%add1 = add i64 %tid.ext, 1
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%gep1 = getelementptr float, float addrspace(1)* %ptr, i64 %add1
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%add2 = add i64 %tid.ext, 2
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%gep2 = getelementptr float, float addrspace(1)* %ptr, i64 %add2
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%outgep = getelementptr float, float addrspace(1)* %out, i64 %tid.ext
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%a = load volatile float, float addrspace(1)* %gep0, align 4
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%b = load volatile float, float addrspace(1)* %gep1, align 4
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%c = load volatile float, float addrspace(1)* %gep2, align 4
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%b.abs = call float @llvm.fabs.f32(float %b) #0
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%mul = fmul float %a, %b.abs
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%sub = fsub float %mul, %c
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store float %sub, float addrspace(1)* %outgep, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}fsub_c_fadd_a_a:
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; SI-DAG: buffer_load_dword [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
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; SI-DAG: buffer_load_dword [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
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; SI: v_mac_f32_e32 [[R2]], -2.0, [[R1]]
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; SI: buffer_store_dword [[R2]]
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define void @fsub_c_fadd_a_a(float addrspace(1)* %out, float addrspace(1)* %in) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr float, float addrspace(1)* %out, i32 %tid
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%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
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%gep.out = getelementptr float, float addrspace(1)* %out, i32 %tid
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%r1 = load volatile float, float addrspace(1)* %gep.0
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%r2 = load volatile float, float addrspace(1)* %gep.1
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%add = fadd float %r1, %r1
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%r3 = fsub float %r2, %add
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store float %r3, float addrspace(1)* %gep.out
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ret void
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}
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; FUNC-LABEL: {{^}}fsub_fadd_a_a_c:
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; SI-DAG: buffer_load_dword [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
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; SI-DAG: buffer_load_dword [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
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; SI: v_mad_f32 [[RESULT:v[0-9]+]], 2.0, [[R1]], -[[R2]]
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; SI: buffer_store_dword [[RESULT]]
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define void @fsub_fadd_a_a_c(float addrspace(1)* %out, float addrspace(1)* %in) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep.0 = getelementptr float, float addrspace(1)* %out, i32 %tid
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%gep.1 = getelementptr float, float addrspace(1)* %gep.0, i32 1
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%gep.out = getelementptr float, float addrspace(1)* %out, i32 %tid
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%r1 = load volatile float, float addrspace(1)* %gep.0
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%r2 = load volatile float, float addrspace(1)* %gep.1
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%add = fadd float %r1, %r1
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%r3 = fsub float %add, %r2
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store float %r3, float addrspace(1)* %gep.out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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