186 lines
5.2 KiB
LLVM
186 lines
5.2 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl | FileCheck %s
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; 256-bit
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; CHECK-LABEL: vpandd256
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; CHECK: vpandd %ymm
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; CHECK: ret
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define <8 x i32> @vpandd256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%x = and <8 x i32> %a2, %b
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ret <8 x i32> %x
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}
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; CHECK-LABEL: vpandnd256
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; CHECK: vpandnd %ymm
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; CHECK: ret
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define <8 x i32> @vpandnd256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%b2 = xor <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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%x = and <8 x i32> %a2, %b2
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ret <8 x i32> %x
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}
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; CHECK-LABEL: vpord256
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; CHECK: vpord %ymm
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; CHECK: ret
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define <8 x i32> @vpord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%x = or <8 x i32> %a2, %b
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ret <8 x i32> %x
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}
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; CHECK-LABEL: vpxord256
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; CHECK: vpxord %ymm
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; CHECK: ret
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define <8 x i32> @vpxord256(<8 x i32> %a, <8 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%x = xor <8 x i32> %a2, %b
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ret <8 x i32> %x
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}
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; CHECK-LABEL: vpandq256
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; CHECK: vpandq %ymm
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; CHECK: ret
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define <4 x i64> @vpandq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
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%x = and <4 x i64> %a2, %b
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ret <4 x i64> %x
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}
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; CHECK-LABEL: vpandnq256
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; CHECK: vpandnq %ymm
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; CHECK: ret
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define <4 x i64> @vpandnq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
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%b2 = xor <4 x i64> %b, <i64 -1, i64 -1, i64 -1, i64 -1>
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%x = and <4 x i64> %a2, %b2
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ret <4 x i64> %x
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}
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; CHECK-LABEL: vporq256
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; CHECK: vporq %ymm
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; CHECK: ret
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define <4 x i64> @vporq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
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%x = or <4 x i64> %a2, %b
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ret <4 x i64> %x
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}
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; CHECK-LABEL: vpxorq256
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; CHECK: vpxorq %ymm
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; CHECK: ret
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define <4 x i64> @vpxorq256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i64> %a, <i64 1, i64 1, i64 1, i64 1>
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%x = xor <4 x i64> %a2, %b
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ret <4 x i64> %x
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}
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; 128-bit
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; CHECK-LABEL: vpandd128
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; CHECK: vpandd %xmm
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; CHECK: ret
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define <4 x i32> @vpandd128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
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%x = and <4 x i32> %a2, %b
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ret <4 x i32> %x
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}
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; CHECK-LABEL: vpandnd128
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; CHECK: vpandnd %xmm
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; CHECK: ret
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define <4 x i32> @vpandnd128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
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%b2 = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
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%x = and <4 x i32> %a2, %b2
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ret <4 x i32> %x
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}
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; CHECK-LABEL: vpord128
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; CHECK: vpord %xmm
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; CHECK: ret
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define <4 x i32> @vpord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
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%x = or <4 x i32> %a2, %b
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ret <4 x i32> %x
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}
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; CHECK-LABEL: vpxord128
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; CHECK: vpxord %xmm
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; CHECK: ret
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define <4 x i32> @vpxord128(<4 x i32> %a, <4 x i32> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1>
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%x = xor <4 x i32> %a2, %b
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ret <4 x i32> %x
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}
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; CHECK-LABEL: vpandq128
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; CHECK: vpandq %xmm
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; CHECK: ret
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define <2 x i64> @vpandq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%x = and <2 x i64> %a2, %b
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ret <2 x i64> %x
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}
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; CHECK-LABEL: vpandnq128
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; CHECK: vpandnq %xmm
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; CHECK: ret
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define <2 x i64> @vpandnq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%b2 = xor <2 x i64> %b, <i64 -1, i64 -1>
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%x = and <2 x i64> %a2, %b2
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ret <2 x i64> %x
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}
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; CHECK-LABEL: vporq128
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; CHECK: vporq %xmm
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; CHECK: ret
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define <2 x i64> @vporq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%x = or <2 x i64> %a2, %b
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ret <2 x i64> %x
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}
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; CHECK-LABEL: vpxorq128
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; CHECK: vpxorq %xmm
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; CHECK: ret
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define <2 x i64> @vpxorq128(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
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entry:
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; Force the execution domain with an add.
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%a2 = add <2 x i64> %a, <i64 1, i64 1>
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%x = xor <2 x i64> %a2, %b
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ret <2 x i64> %x
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}
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