116 lines
3.8 KiB
C++
116 lines
3.8 KiB
C++
/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_
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#define ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_
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#include "arch/instruction_set_features.h"
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namespace art {
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class ArmInstructionSetFeatures;
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using ArmFeaturesUniquePtr = std::unique_ptr<const ArmInstructionSetFeatures>;
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// Instruction set features relevant to the ARM architecture.
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class ArmInstructionSetFeatures final : public InstructionSetFeatures {
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public:
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// Process a CPU variant string like "krait" or "cortex-a15" and create InstructionSetFeatures.
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static ArmFeaturesUniquePtr FromVariant(const std::string& variant, std::string* error_msg);
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// Parse a bitmap and create an InstructionSetFeatures.
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static ArmFeaturesUniquePtr FromBitmap(uint32_t bitmap);
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// Turn C pre-processor #defines into the equivalent instruction set features.
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static ArmFeaturesUniquePtr FromCppDefines();
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// Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures.
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static ArmFeaturesUniquePtr FromCpuInfo();
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// Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce
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// InstructionSetFeatures.
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static ArmFeaturesUniquePtr FromHwcap();
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// Use assembly tests of the current runtime (ie kRuntimeISA) to determine the
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// InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo.
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static ArmFeaturesUniquePtr FromAssembly();
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// Use external cpu_features library.
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static ArmFeaturesUniquePtr FromCpuFeatures();
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bool Equals(const InstructionSetFeatures* other) const override;
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bool HasAtLeast(const InstructionSetFeatures* other) const override;
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InstructionSet GetInstructionSet() const override {
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return InstructionSet::kArm;
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}
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uint32_t AsBitmap() const override;
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// Return a string of the form "div,lpae" or "none".
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std::string GetFeatureString() const override;
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// Is the divide instruction feature enabled?
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bool HasDivideInstruction() const {
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return has_div_;
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}
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// Are the ldrd and strd instructions atomic? This is commonly true when the Large Physical
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// Address Extension (LPAE) is present.
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bool HasAtomicLdrdAndStrd() const {
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return has_atomic_ldrd_strd_;
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}
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// Are ARMv8-A instructions available?
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bool HasARMv8AInstructions() const {
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return has_armv8a_;
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}
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virtual ~ArmInstructionSetFeatures() {}
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protected:
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// Parse a vector of the form "div", "lpae" adding these to a new ArmInstructionSetFeatures.
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std::unique_ptr<const InstructionSetFeatures>
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AddFeaturesFromSplitString(const std::vector<std::string>& features,
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std::string* error_msg) const override;
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private:
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ArmInstructionSetFeatures(bool has_div,
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bool has_atomic_ldrd_strd,
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bool has_armv8a)
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: InstructionSetFeatures(),
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has_div_(has_div),
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has_atomic_ldrd_strd_(has_atomic_ldrd_strd),
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has_armv8a_(has_armv8a) {}
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// Bitmap positions for encoding features as a bitmap.
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enum {
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kDivBitfield = 1 << 0,
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kAtomicLdrdStrdBitfield = 1 << 1,
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kARMv8A = 1 << 2,
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};
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const bool has_div_;
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const bool has_atomic_ldrd_strd_;
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const bool has_armv8a_;
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DISALLOW_COPY_AND_ASSIGN(ArmInstructionSetFeatures);
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};
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} // namespace art
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#endif // ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_
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