453 lines
16 KiB
C++
453 lines
16 KiB
C++
/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "instruction_set_features_arm64.h"
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#if defined(ART_TARGET_ANDROID) && defined(__aarch64__)
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#include <asm/hwcap.h>
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#include <sys/auxv.h>
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#endif
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#include <fstream>
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#include <sstream>
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#include <android-base/logging.h>
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#include <android-base/stringprintf.h>
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#include <android-base/strings.h>
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#include "base/array_ref.h"
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#include "base/stl_util.h"
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#include <cpu_features_macros.h>
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#ifdef CPU_FEATURES_ARCH_AARCH64
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// This header can only be included on aarch64 targets,
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// as determined by cpu_features own define.
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#include <cpuinfo_aarch64.h>
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#endif
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namespace art {
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using android::base::StringPrintf;
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromVariant(
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const std::string& variant, std::string* error_msg) {
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// The CPU variant string is passed to ART through --instruction-set-variant option.
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// During build, such setting is from TARGET_CPU_VARIANT in device BoardConfig.mk, for example:
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// TARGET_CPU_VARIANT := cortex-a75
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// Look for variants that need a fix for a53 erratum 835769.
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static const char* arm64_variants_with_a53_835769_bug[] = {
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// Pessimistically assume all generic CPUs are cortex-a53.
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"default",
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"generic",
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"cortex-a53",
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"cortex-a53.a57",
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"cortex-a53.a72",
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// Pessimistically assume following "big" cortex CPUs are paired with a cortex-a53.
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"cortex-a57",
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"cortex-a72",
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"cortex-a73",
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};
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static const char* arm64_variants_with_crc[] = {
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"default",
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"generic",
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"cortex-a35",
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"cortex-a53",
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"cortex-a53.a57",
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"cortex-a53.a72",
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"cortex-a57",
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"cortex-a72",
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"cortex-a73",
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"cortex-a55",
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"cortex-a75",
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"cortex-a76",
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"exynos-m1",
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"exynos-m2",
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"exynos-m3",
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"kryo",
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"kryo385",
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"kryo785",
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};
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static const char* arm64_variants_with_lse[] = {
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"cortex-a55",
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"cortex-a75",
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"cortex-a76",
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"kryo385",
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"kryo785",
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};
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static const char* arm64_variants_with_fp16[] = {
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"cortex-a55",
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"cortex-a75",
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"cortex-a76",
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"kryo385",
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"kryo785",
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};
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static const char* arm64_variants_with_dotprod[] = {
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"cortex-a55",
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"cortex-a75",
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"cortex-a76",
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};
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bool needs_a53_835769_fix = FindVariantInArray(arm64_variants_with_a53_835769_bug,
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arraysize(arm64_variants_with_a53_835769_bug),
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variant);
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// The variants that need a fix for 843419 are the same that need a fix for 835769.
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bool needs_a53_843419_fix = needs_a53_835769_fix;
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bool has_crc = FindVariantInArray(arm64_variants_with_crc,
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arraysize(arm64_variants_with_crc),
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variant);
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bool has_lse = FindVariantInArray(arm64_variants_with_lse,
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arraysize(arm64_variants_with_lse),
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variant);
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bool has_fp16 = FindVariantInArray(arm64_variants_with_fp16,
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arraysize(arm64_variants_with_fp16),
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variant);
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bool has_dotprod = FindVariantInArray(arm64_variants_with_dotprod,
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arraysize(arm64_variants_with_dotprod),
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variant);
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// Currently there are no cpu variants which support SVE.
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bool has_sve = false;
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if (!needs_a53_835769_fix) {
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// Check to see if this is an expected variant. `other_arm64_known_variants` contains the
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// variants which do *not* need a fix for a53 erratum 835769.
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static const char* other_arm64_known_variants[] = {
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"cortex-a35",
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"cortex-a55",
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"cortex-a75",
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"cortex-a76",
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"exynos-m1",
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"exynos-m2",
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"exynos-m3",
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"kryo",
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"kryo300",
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"kryo385",
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"kryo785",
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};
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if (!FindVariantInArray(
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other_arm64_known_variants, arraysize(other_arm64_known_variants), variant)) {
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std::ostringstream os;
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os << "Unexpected CPU variant for Arm64: " << variant << ".\n"
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<< "Known variants that need a fix for a53 erratum 835769: "
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<< android::base::Join(ArrayRef<const char* const>(arm64_variants_with_a53_835769_bug),
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", ")
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<< ".\n"
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<< "Known variants that do not need a fix for a53 erratum 835769: "
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<< android::base::Join(ArrayRef<const char* const>(other_arm64_known_variants), ", ");
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*error_msg = os.str();
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return nullptr;
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}
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}
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return Arm64FeaturesUniquePtr(new Arm64InstructionSetFeatures(needs_a53_835769_fix,
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needs_a53_843419_fix,
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has_crc,
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has_lse,
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has_fp16,
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has_dotprod,
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has_sve));
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromBitmap(uint32_t bitmap) {
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bool is_a53 = (bitmap & kA53Bitfield) != 0;
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bool has_crc = (bitmap & kCRCBitField) != 0;
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bool has_lse = (bitmap & kLSEBitField) != 0;
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bool has_fp16 = (bitmap & kFP16BitField) != 0;
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bool has_dotprod = (bitmap & kDotProdBitField) != 0;
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bool has_sve = (bitmap & kSVEBitField) != 0;
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return Arm64FeaturesUniquePtr(new Arm64InstructionSetFeatures(is_a53,
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is_a53,
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has_crc,
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has_lse,
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has_fp16,
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has_dotprod,
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has_sve));
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromCppDefines() {
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// For more details about ARM feature macros, refer to
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// Arm C Language Extensions Documentation (ACLE).
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// https://developer.arm.com/docs/101028/latest
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bool needs_a53_835769_fix = false;
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bool needs_a53_843419_fix = needs_a53_835769_fix;
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bool has_crc = false;
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bool has_lse = false;
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bool has_fp16 = false;
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bool has_dotprod = false;
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bool has_sve = false;
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#if defined (__ARM_FEATURE_CRC32)
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has_crc = true;
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#endif
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#if defined (__ARM_ARCH_8_1A__) || defined (__ARM_ARCH_8_2A__)
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// There is no specific ACLE macro defined for ARMv8.1 LSE features.
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has_lse = true;
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#endif
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#if defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) || defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
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has_fp16 = true;
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#endif
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#if defined (__ARM_FEATURE_DOTPROD)
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has_dotprod = true;
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#endif
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#if defined (__ARM_FEATURE_SVE)
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has_sve = true;
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#endif
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return Arm64FeaturesUniquePtr(new Arm64InstructionSetFeatures(needs_a53_835769_fix,
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needs_a53_843419_fix,
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has_crc,
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has_lse,
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has_fp16,
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has_dotprod,
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has_sve));
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromCpuInfo() {
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UNIMPLEMENTED(WARNING);
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return FromCppDefines();
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromHwcap() {
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bool needs_a53_835769_fix = false; // No HWCAP for this.
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bool needs_a53_843419_fix = false; // No HWCAP for this.
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bool has_crc = false;
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bool has_lse = false;
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bool has_fp16 = false;
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bool has_dotprod = false;
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bool has_sve = false;
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#if defined(ART_TARGET_ANDROID) && defined(__aarch64__)
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uint64_t hwcaps = getauxval(AT_HWCAP);
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has_crc = hwcaps & HWCAP_CRC32 ? true : false;
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has_lse = hwcaps & HWCAP_ATOMICS ? true : false;
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has_fp16 = hwcaps & HWCAP_FPHP ? true : false;
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has_dotprod = hwcaps & HWCAP_ASIMDDP ? true : false;
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has_sve = hwcaps & HWCAP_SVE ? true : false;
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#endif
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return Arm64FeaturesUniquePtr(new Arm64InstructionSetFeatures(needs_a53_835769_fix,
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needs_a53_843419_fix,
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has_crc,
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has_lse,
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has_fp16,
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has_dotprod,
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has_sve));
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromAssembly() {
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UNIMPLEMENTED(WARNING);
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return FromCppDefines();
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}
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Arm64FeaturesUniquePtr Arm64InstructionSetFeatures::FromCpuFeatures() {
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#ifdef CPU_FEATURES_ARCH_AARCH64
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auto features = cpu_features::GetAarch64Info().features;
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return Arm64FeaturesUniquePtr(new Arm64InstructionSetFeatures(false,
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false,
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features.crc32,
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features.atomics,
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features.fphp,
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features.asimddp,
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features.sve));
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#else
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UNIMPLEMENTED(WARNING);
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return FromCppDefines();
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#endif
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}
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bool Arm64InstructionSetFeatures::Equals(const InstructionSetFeatures* other) const {
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if (InstructionSet::kArm64 != other->GetInstructionSet()) {
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return false;
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}
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const Arm64InstructionSetFeatures* other_as_arm64 = other->AsArm64InstructionSetFeatures();
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return fix_cortex_a53_835769_ == other_as_arm64->fix_cortex_a53_835769_ &&
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fix_cortex_a53_843419_ == other_as_arm64->fix_cortex_a53_843419_ &&
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has_crc_ == other_as_arm64->has_crc_ &&
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has_lse_ == other_as_arm64->has_lse_ &&
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has_fp16_ == other_as_arm64->has_fp16_ &&
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has_dotprod_ == other_as_arm64->has_dotprod_ &&
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has_sve_ == other_as_arm64->has_sve_;
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}
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bool Arm64InstructionSetFeatures::HasAtLeast(const InstructionSetFeatures* other) const {
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if (InstructionSet::kArm64 != other->GetInstructionSet()) {
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return false;
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}
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// Currently 'default' feature is cortex-a53 with fixes 835769 and 843419.
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// Newer CPUs are not required to have such features,
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// so these two a53 fix features are not tested for HasAtLeast.
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const Arm64InstructionSetFeatures* other_as_arm64 = other->AsArm64InstructionSetFeatures();
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return (has_crc_ || !other_as_arm64->has_crc_)
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&& (has_lse_ || !other_as_arm64->has_lse_)
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&& (has_fp16_ || !other_as_arm64->has_fp16_)
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&& (has_dotprod_ || !other_as_arm64->has_dotprod_)
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&& (has_sve_ || !other_as_arm64->has_sve_);
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}
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uint32_t Arm64InstructionSetFeatures::AsBitmap() const {
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return (fix_cortex_a53_835769_ ? kA53Bitfield : 0)
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| (has_crc_ ? kCRCBitField : 0)
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| (has_lse_ ? kLSEBitField: 0)
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| (has_fp16_ ? kFP16BitField: 0)
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| (has_dotprod_ ? kDotProdBitField : 0)
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| (has_sve_ ? kSVEBitField : 0);
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}
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std::string Arm64InstructionSetFeatures::GetFeatureString() const {
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std::string result;
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if (fix_cortex_a53_835769_) {
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result += "a53";
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} else {
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result += "-a53";
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}
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if (has_crc_) {
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result += ",crc";
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} else {
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result += ",-crc";
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}
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if (has_lse_) {
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result += ",lse";
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} else {
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result += ",-lse";
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}
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if (has_fp16_) {
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result += ",fp16";
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} else {
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result += ",-fp16";
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}
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if (has_dotprod_) {
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result += ",dotprod";
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} else {
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result += ",-dotprod";
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}
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if (has_sve_) {
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result += ",sve";
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} else {
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result += ",-sve";
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}
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return result;
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}
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std::unique_ptr<const InstructionSetFeatures>
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Arm64InstructionSetFeatures::AddFeaturesFromSplitString(
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const std::vector<std::string>& features, std::string* error_msg) const {
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// This 'features' string is from '--instruction-set-features=' option in ART.
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// These ARMv8.x feature strings align with those introduced in other compilers:
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// https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
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// User can also use armv8.x-a to select group of features:
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// armv8.1-a is equivalent to crc,lse
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// armv8.2-a is equivalent to crc,lse,fp16
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// armv8.3-a is equivalent to crc,lse,fp16
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// armv8.4-a is equivalent to crc,lse,fp16,dotprod
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// For detailed optional & mandatory features support in armv8.x-a,
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// please refer to section 'A1.7 ARMv8 architecture extensions' in
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// ARM Architecture Reference Manual ARMv8 document:
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// https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0487/latest/
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// arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile/
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bool is_a53 = fix_cortex_a53_835769_;
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bool has_crc = has_crc_;
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bool has_lse = has_lse_;
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bool has_fp16 = has_fp16_;
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bool has_dotprod = has_dotprod_;
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bool has_sve = has_sve_;
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for (const std::string& feature : features) {
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DCHECK_EQ(android::base::Trim(feature), feature)
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<< "Feature name is not trimmed: '" << feature << "'";
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if (feature == "a53") {
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is_a53 = true;
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} else if (feature == "-a53") {
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is_a53 = false;
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} else if (feature == "crc") {
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has_crc = true;
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} else if (feature == "-crc") {
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has_crc = false;
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} else if (feature == "lse") {
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has_lse = true;
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} else if (feature == "-lse") {
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has_lse = false;
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} else if (feature == "fp16") {
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has_fp16 = true;
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} else if (feature == "-fp16") {
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has_fp16 = false;
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} else if (feature == "dotprod") {
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has_dotprod = true;
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} else if (feature == "-dotprod") {
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has_dotprod = false;
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} else if (feature == "sve") {
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has_sve = true;
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} else if (feature == "-sve") {
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has_sve = false;
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} else if (feature == "armv8.1-a") {
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has_crc = true;
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has_lse = true;
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} else if (feature == "armv8.2-a") {
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has_crc = true;
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has_lse = true;
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has_fp16 = true;
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} else if (feature == "armv8.3-a") {
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has_crc = true;
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has_lse = true;
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has_fp16 = true;
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} else if (feature == "armv8.4-a") {
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has_crc = true;
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has_lse = true;
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has_fp16 = true;
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has_dotprod = true;
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} else {
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*error_msg = StringPrintf("Unknown instruction set feature: '%s'", feature.c_str());
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return nullptr;
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}
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}
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return std::unique_ptr<const InstructionSetFeatures>(
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new Arm64InstructionSetFeatures(is_a53, // erratum 835769
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is_a53, // erratum 843419
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has_crc,
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has_lse,
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has_fp16,
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has_dotprod,
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has_sve));
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}
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std::unique_ptr<const InstructionSetFeatures>
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Arm64InstructionSetFeatures::AddRuntimeDetectedFeatures(
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const InstructionSetFeatures *features) const {
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const Arm64InstructionSetFeatures *arm64_features = features->AsArm64InstructionSetFeatures();
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return std::unique_ptr<const InstructionSetFeatures>(
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new Arm64InstructionSetFeatures(fix_cortex_a53_835769_,
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fix_cortex_a53_843419_,
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arm64_features->has_crc_,
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arm64_features->has_lse_,
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arm64_features->has_fp16_,
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arm64_features->has_dotprod_,
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arm64_features->has_sve_));
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}
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} // namespace art
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