144 lines
4.2 KiB
ArmAsm
144 lines
4.2 KiB
ArmAsm
/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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*/
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#ifndef ART_RUNTIME_ARCH_ARM64_MEMCMP16_ARM64_S_
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#define ART_RUNTIME_ARCH_ARM64_MEMCMP16_ARM64_S_
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#include "asm_support_arm64.S"
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/* Parameters and result. */
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#define src1 x0
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#define src2 x1
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#define limit x2
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#define result x0
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/* Internal variables. */
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#define data1 x3
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#define data1w w3
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#define data2 x4
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#define data2w w4
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#define has_nul x5
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#define diff x6
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#define endloop x7
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#define tmp1 x8
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#define tmp2 x9
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#define tmp3 x10
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#define limit_wd x12
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#define mask x13
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// WARNING: If you change this code to use x14 and x15, you must also change
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// art_quick_string_compareto, which relies on these temps being unused.
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ENTRY __memcmp16
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cbz limit, .Lret0
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lsl limit, limit, #1 /* Half-words to bytes. */
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eor tmp1, src1, src2
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tst tmp1, #7
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b.ne .Lmisaligned8
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ands tmp1, src1, #7
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b.ne .Lmutual_align
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add limit_wd, limit, #7
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lsr limit_wd, limit_wd, #3
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/* Start of performance-critical section -- one 64B cache line. */
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.Lloop_aligned:
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ldr data1, [src1], #8
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ldr data2, [src2], #8
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.Lstart_realigned:
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subs limit_wd, limit_wd, #1
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eor diff, data1, data2 /* Non-zero if differences found. */
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csinv endloop, diff, xzr, ne /* Last Dword or differences. */
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cbz endloop, .Lloop_aligned
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/* End of performance-critical section -- one 64B cache line. */
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/* Not reached the limit, must have found a diff. */
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cbnz limit_wd, .Lnot_limit
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/* Limit % 8 == 0 => all bytes significant. */
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ands limit, limit, #7
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b.eq .Lnot_limit
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lsl limit, limit, #3 /* Bits -> bytes. */
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mov mask, #~0
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lsl mask, mask, limit
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bic data1, data1, mask
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bic data2, data2, mask
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.Lnot_limit:
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// Swap the byte order of diff. Exact reverse is not important, as we only need to detect
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// the half-word.
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rev diff, diff
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// The most significant bit of DIFF marks the least significant bit of change between DATA1/2
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clz diff, diff
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// Mask off 0xF to have shift amount. Why does ARM64 not have BIC with immediate?!?!
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bfi diff, xzr, #0, #4
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// Create a 16b mask
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mov mask, #0xFFFF
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// Shift to the right half-word.
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lsr data1, data1, diff
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lsr data2, data2, diff
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// Mask the lowest half-word.
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and data1, data1, mask
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and data2, data2, mask
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// Compute difference.
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sub result, data1, data2
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ret
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.Lmutual_align:
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/* Sources are mutually aligned, but are not currently at an
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alignment boundary. Round down the addresses and then mask off
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the bytes that precede the start point. */
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bic src1, src1, #7
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bic src2, src2, #7
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add limit, limit, tmp1 /* Adjust the limit for the extra. */
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lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
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ldr data1, [src1], #8
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neg tmp1, tmp1 /* Bits to alignment -64. */
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ldr data2, [src2], #8
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mov tmp2, #~0
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
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add limit_wd, limit, #7
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orr data1, data1, tmp2
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orr data2, data2, tmp2
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lsr limit_wd, limit_wd, #3
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b .Lstart_realigned
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.Lret0:
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mov result, #0
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ret
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.p2align 6
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.Lmisaligned8:
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sub limit, limit, #1
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1:
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/* Perhaps we can do better than this. */
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ldrh data1w, [src1], #2
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ldrh data2w, [src2], #2
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subs limit, limit, #2
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ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */
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b.eq 1b
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sub result, data1, data2
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ret
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END __memcmp16
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#endif // ART_RUNTIME_ARCH_ARM64_MEMCMP16_ARM64_S_
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