133 lines
4.9 KiB
C++
133 lines
4.9 KiB
C++
/*
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* Copyright (C) 2011 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "context_x86.h"
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#include "base/bit_utils.h"
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#include "base/bit_utils_iterator.h"
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#include "base/memory_tool.h"
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#include "quick/quick_method_frame_info.h"
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namespace art {
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namespace x86 {
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static constexpr uintptr_t gZero = 0;
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void X86Context::Reset() {
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std::fill_n(gprs_, arraysize(gprs_), nullptr);
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std::fill_n(fprs_, arraysize(fprs_), nullptr);
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gprs_[ESP] = &esp_;
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gprs_[EAX] = &arg0_;
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// Initialize registers with easy to spot debug values.
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esp_ = X86Context::kBadGprBase + ESP;
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eip_ = X86Context::kBadGprBase + kNumberOfCpuRegisters;
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arg0_ = 0;
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}
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void X86Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
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int spill_pos = 0;
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// Core registers come first, from the highest down to the lowest.
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uint32_t core_regs =
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frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters);
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DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
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for (uint32_t core_reg : HighToLowBits(core_regs)) {
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gprs_[core_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
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++spill_pos;
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}
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DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
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// FP registers come second, from the highest down to the lowest.
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uint32_t fp_regs = frame_info.FpSpillMask();
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DCHECK_EQ(0u, fp_regs & (static_cast<uint32_t>(-1) << kNumberOfFloatRegisters));
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for (uint32_t fp_reg : HighToLowBits(fp_regs)) {
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// Two void* per XMM register.
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fprs_[2 * fp_reg] = reinterpret_cast<uint32_t*>(
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CalleeSaveAddress(frame, spill_pos + 1, frame_info.FrameSizeInBytes()));
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fprs_[2 * fp_reg + 1] = reinterpret_cast<uint32_t*>(
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CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes()));
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spill_pos += 2;
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}
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DCHECK_EQ(spill_pos,
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POPCOUNT(frame_info.CoreSpillMask()) - 1 + 2 * POPCOUNT(frame_info.FpSpillMask()));
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}
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void X86Context::SmashCallerSaves() {
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// This needs to be 0 because we want a null/zero return value.
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gprs_[EAX] = const_cast<uintptr_t*>(&gZero);
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gprs_[EDX] = const_cast<uintptr_t*>(&gZero);
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gprs_[ECX] = nullptr;
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gprs_[EBX] = nullptr;
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memset(&fprs_[0], '\0', sizeof(fprs_));
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}
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void X86Context::SetGPR(uint32_t reg, uintptr_t value) {
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CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
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DCHECK(IsAccessibleGPR(reg));
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CHECK_NE(gprs_[reg], &gZero);
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*gprs_[reg] = value;
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}
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void X86Context::SetFPR(uint32_t reg, uintptr_t value) {
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CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
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DCHECK(IsAccessibleFPR(reg));
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CHECK_NE(fprs_[reg], reinterpret_cast<const uint32_t*>(&gZero));
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*fprs_[reg] = value;
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}
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void X86Context::DoLongJump() {
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#if defined(__i386__)
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// Array of GPR values, filled from the context backward for the long jump pop. We add a slot at
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// the top for the stack pointer that doesn't get popped in a pop-all.
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volatile uintptr_t gprs[kNumberOfCpuRegisters + 1];
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for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) {
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gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86Context::kBadGprBase + i;
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}
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uint32_t fprs[kNumberOfFloatRegisters];
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for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
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fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : X86Context::kBadFprBase + i;
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}
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// We want to load the stack pointer one slot below so that the ret will pop eip.
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uintptr_t esp = gprs[kNumberOfCpuRegisters - ESP - 1] - sizeof(intptr_t);
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gprs[kNumberOfCpuRegisters] = esp;
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*(reinterpret_cast<uintptr_t*>(esp)) = eip_;
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MEMORY_TOOL_HANDLE_NO_RETURN;
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__asm__ __volatile__(
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"movl %1, %%ebx\n\t" // Address base of FPRs.
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"movsd 0(%%ebx), %%xmm0\n\t" // Load up XMM0-XMM7.
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"movsd 8(%%ebx), %%xmm1\n\t"
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"movsd 16(%%ebx), %%xmm2\n\t"
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"movsd 24(%%ebx), %%xmm3\n\t"
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"movsd 32(%%ebx), %%xmm4\n\t"
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"movsd 40(%%ebx), %%xmm5\n\t"
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"movsd 48(%%ebx), %%xmm6\n\t"
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"movsd 56(%%ebx), %%xmm7\n\t"
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"movl %0, %%esp\n\t" // ESP points to gprs.
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"popal\n\t" // Load all registers except ESP and EIP with values in gprs.
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"popl %%esp\n\t" // Load stack pointer.
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"ret\n\t" // From higher in the stack pop eip.
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: // output.
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: "g"(&gprs[0]), "g"(&fprs[0]) // input.
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:); // clobber.
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#else
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UNIMPLEMENTED(FATAL);
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#endif
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UNREACHABLE();
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}
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} // namespace x86
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} // namespace art
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