410 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
			
		
		
	
	
			410 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
| %def unused():
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|     bkpt
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| 
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| %def op_const():
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|     /* const vAA, #+BBBBbbbb */
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     FETCH r0, 1                         @ r0<- bbbb (low)
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|     FETCH r1, 2                         @ r1<- BBBB (high)
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|     FETCH_ADVANCE_INST 3                @ advance rPC, load rINST
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|     orr     r0, r0, r1, lsl #16         @ r0<- BBBBbbbb
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG r0, r3                     @ vAA<- r0
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_16():
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|     /* const/16 vAA, #+BBBB */
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|     FETCH_S r0, 1                       @ r0<- ssssBBBB (sign-extended)
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     SET_VREG r0, r3                     @ vAA<- r0
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_4():
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|     /* const/4 vA, #+B */
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|     sbfx    r1, rINST, #12, #4          @ r1<- sssssssB (sign-extended)
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|     ubfx    r0, rINST, #8, #4           @ r0<- A
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     GET_INST_OPCODE ip                  @ ip<- opcode from rINST
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|     SET_VREG r1, r0                     @ fp[A]<- r1
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|     GOTO_OPCODE ip                      @ execute next instruction
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| 
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| %def op_const_high16():
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|     /* const/high16 vAA, #+BBBB0000 */
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|     FETCH r0, 1                         @ r0<- 0000BBBB (zero-extended)
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     mov     r0, r0, lsl #16             @ r0<- BBBB0000
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     SET_VREG r0, r3                     @ vAA<- r0
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_object(jumbo="0", helper="nterp_load_object"):
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|    // Fast-path which gets the object from thread-local cache.
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| %  fetch_from_thread_cache("r0", miss_label="2f")
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|    cmp rMR, #0
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|    bne 3f
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| 1:
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|    mov     r1, rINST, lsr #8           @ r1<- AA
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|    .if $jumbo
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|    FETCH_ADVANCE_INST 3                // advance rPC, load rINST
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|    .else
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|    FETCH_ADVANCE_INST 2                // advance rPC, load rINST
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|    .endif
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|    GET_INST_OPCODE ip                  // extract opcode from rINST
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|    SET_VREG_OBJECT r0, r1              // vAA <- value
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|    GOTO_OPCODE ip                      // jump to next instruction
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| 2:
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|    EXPORT_PC
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|    mov r0, rSELF
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|    ldr r1, [sp]
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|    mov r2, rPC
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|    bl $helper
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|    b 1b
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| 3:
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|    bl art_quick_read_barrier_mark_reg00
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|    b 1b
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| 
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| %def op_const_class():
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| %  op_const_object(jumbo="0", helper="nterp_get_class_or_allocate_object")
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| 
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| %def op_const_method_handle():
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| %  op_const_object(jumbo="0")
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| 
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| %def op_const_method_type():
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| %  op_const_object(jumbo="0")
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| 
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| %def op_const_string():
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|    /* const/string vAA, String@BBBB */
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| %  op_const_object(jumbo="0")
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| 
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| %def op_const_string_jumbo():
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|    /* const/string vAA, String@BBBBBBBB */
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| %  op_const_object(jumbo="1")
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| 
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| %def op_const_wide():
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|     /* const-wide vAA, #+HHHHhhhhBBBBbbbb */
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|     FETCH r0, 1                         @ r0<- bbbb (low)
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|     FETCH r1, 2                         @ r1<- BBBB (low middle)
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|     FETCH r2, 3                         @ r2<- hhhh (high middle)
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|     orr     r0, r0, r1, lsl #16         @ r0<- BBBBbbbb (low word)
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|     FETCH r3, 4                         @ r3<- HHHH (high)
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|     mov     r4, rINST, lsr #8           @ r4<- AA
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|     orr     r1, r2, r3, lsl #16         @ r1<- HHHHhhhh (high word)
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|     CLEAR_SHADOW_PAIR r4, r2, r3        @ Zero out the shadow regs
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|     FETCH_ADVANCE_INST 5                @ advance rPC, load rINST
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|     VREG_INDEX_TO_ADDR r4, r4           @ r4<- &fp[AA]
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r4    @ vAA<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_wide_16():
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|     /* const-wide/16 vAA, #+BBBB */
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|     FETCH_S r0, 1                       @ r0<- ssssBBBB (sign-extended)
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     mov     r1, r0, asr #31             @ r1<- ssssssss
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     CLEAR_SHADOW_PAIR r3, r2, lr        @ Zero out the shadow regs
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[AA]
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r3    @ vAA<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_wide_32():
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|     /* const-wide/32 vAA, #+BBBBbbbb */
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|     FETCH r0, 1                         @ r0<- 0000bbbb (low)
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     FETCH_S r2, 2                       @ r2<- ssssBBBB (high)
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|     FETCH_ADVANCE_INST 3                @ advance rPC, load rINST
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|     orr     r0, r0, r2, lsl #16         @ r0<- BBBBbbbb
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|     CLEAR_SHADOW_PAIR r3, r2, lr        @ Zero out the shadow regs
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[AA]
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|     mov     r1, r0, asr #31             @ r1<- ssssssss
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r3    @ vAA<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_const_wide_high16():
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|     /* const-wide/high16 vAA, #+BBBB000000000000 */
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|     FETCH r1, 1                         @ r1<- 0000BBBB (zero-extended)
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|     mov     r3, rINST, lsr #8           @ r3<- AA
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|     mov     r0, #0                      @ r0<- 00000000
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|     mov     r1, r1, lsl #16             @ r1<- BBBB0000
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     CLEAR_SHADOW_PAIR r3, r0, r2        @ Zero shadow regs
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[AA]
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r3    @ vAA<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_monitor_enter():
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|     /*
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|      * Synchronize on an object.
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|      */
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|     /* monitor-enter vAA */
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|     EXPORT_PC
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|     mov      r2, rINST, lsr #8           @ r2<- AA
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|     GET_VREG r0, r2                      @ r0<- vAA (object)
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|     bl       art_quick_lock_object
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|     FETCH_ADVANCE_INST 1
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|     GET_INST_OPCODE ip                   @ extract opcode from rINST
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|     GOTO_OPCODE ip                       @ jump to next instruction
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| 
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| %def op_monitor_exit():
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|     /*
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|      * Unlock an object.
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|      *
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|      * Exceptions that occur when unlocking a monitor need to appear as
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|      * if they happened at the following instruction.  See the Dalvik
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|      * instruction spec.
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|      */
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|     /* monitor-exit vAA */
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|     EXPORT_PC
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|     mov      r2, rINST, lsr #8          @ r2<- AA
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|     GET_VREG r0, r2                     @ r0<- vAA (object)
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|     bl       art_quick_unlock_object
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|     FETCH_ADVANCE_INST 1                @ before throw: advance rPC, load rINST
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move(is_object="0"):
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|     /* for move, move-object, long-to-int */
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|     /* op vA, vB */
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|     mov     r1, rINST, lsr #12          @ r1<- B from 15:12
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|     ubfx    r0, rINST, #8, #4           @ r0<- A from 11:8
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     GET_VREG r2, r1                     @ r2<- fp[B]
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|     GET_INST_OPCODE ip                  @ ip<- opcode from rINST
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|     .if $is_object
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|     SET_VREG_OBJECT r2, r0              @ fp[A]<- r2
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|     .else
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|     SET_VREG r2, r0                     @ fp[A]<- r2
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|     .endif
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|     GOTO_OPCODE ip                      @ execute next instruction
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| 
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| %def op_move_16(is_object="0"):
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|     /* for: move/16, move-object/16 */
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|     /* op vAAAA, vBBBB */
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|     FETCH r1, 2                         @ r1<- BBBB
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|     FETCH r0, 1                         @ r0<- AAAA
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|     FETCH_ADVANCE_INST 3                @ advance rPC, load rINST
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|     GET_VREG r2, r1                     @ r2<- fp[BBBB]
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     .if $is_object
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|     SET_VREG_OBJECT r2, r0              @ fp[AAAA]<- r2
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|     .else
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|     SET_VREG r2, r0                     @ fp[AAAA]<- r2
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|     .endif
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_exception():
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|     /* move-exception vAA */
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|     mov     r2, rINST, lsr #8           @ r2<- AA
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|     ldr     r3, [rSELF, #THREAD_EXCEPTION_OFFSET]
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|     mov     r1, #0                      @ r1<- 0
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     SET_VREG_OBJECT r3, r2              @ fp[AA]<- exception obj
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     str     r1, [rSELF, #THREAD_EXCEPTION_OFFSET]  @ clear exception
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_from16(is_object="0"):
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|     /* for: move/from16, move-object/from16 */
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|     /* op vAA, vBBBB */
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|     FETCH r1, 1                         @ r1<- BBBB
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|     mov     r0, rINST, lsr #8           @ r0<- AA
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     GET_VREG r2, r1                     @ r2<- fp[BBBB]
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     .if $is_object
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|     SET_VREG_OBJECT r2, r0              @ fp[AA]<- r2
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|     .else
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|     SET_VREG r2, r0                     @ fp[AA]<- r2
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|     .endif
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_object():
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| %  op_move(is_object="1")
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| 
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| %def op_move_object_16():
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| %  op_move_16(is_object="1")
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| 
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| %def op_move_object_from16():
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| %  op_move_from16(is_object="1")
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| 
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| %def op_move_result(is_object="0"):
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|     /* for: move-result, move-result-object */
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|     /* op vAA */
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|     mov     r2, rINST, lsr #8           @ r2<- AA
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     .if $is_object
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|     SET_VREG_OBJECT r0, r2              @ fp[AA]<- r0
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|     .else
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|     SET_VREG r0, r2                     @ fp[AA]<- r0
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|     .endif
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_result_object():
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| %  op_move_result(is_object="1")
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| 
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| %def op_move_result_wide():
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|     /* move-result-wide vAA */
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|     mov     rINST, rINST, lsr #8        @ rINST<- AA
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|     VREG_INDEX_TO_ADDR r2, rINST        @ r2<- &fp[AA]
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|     CLEAR_SHADOW_PAIR rINST, ip, lr     @ Zero out the shadow regs
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r2    @ fp[AA]<- r0/r1
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_wide():
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|     /* move-wide vA, vB */
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|     /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
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|     mov     r3, rINST, lsr #12          @ r3<- B
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|     ubfx    rINST, rINST, #8, #4        @ rINST<- A
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[B]
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|     VREG_INDEX_TO_ADDR r2, rINST        @ r2<- &fp[A]
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|     GET_VREG_WIDE_BY_ADDR r0, r1, r3    @ r0/r1<- fp[B]
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|     CLEAR_SHADOW_PAIR rINST, ip, lr     @ Zero out the shadow regs
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|     FETCH_ADVANCE_INST 1                @ advance rPC, load rINST
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r2    @ fp[A]<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_wide_16():
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|     /* move-wide/16 vAAAA, vBBBB */
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|     /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
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|     FETCH r3, 2                         @ r3<- BBBB
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|     FETCH r2, 1                         @ r2<- AAAA
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[BBBB]
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|     VREG_INDEX_TO_ADDR lr, r2           @ r2<- &fp[AAAA]
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|     GET_VREG_WIDE_BY_ADDR r0, r1, r3    @ r0/r1<- fp[BBBB]
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|     FETCH_ADVANCE_INST 3                @ advance rPC, load rINST
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|     CLEAR_SHADOW_PAIR r2, r3, ip        @ Zero out the shadow regs
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|     SET_VREG_WIDE_BY_ADDR r0, r1, lr    @ fp[AAAA]<- r0/r1
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_move_wide_from16():
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|     /* move-wide/from16 vAA, vBBBB */
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|     /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */
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|     FETCH r3, 1                         @ r3<- BBBB
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|     mov     rINST, rINST, lsr #8        @ rINST<- AA
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|     VREG_INDEX_TO_ADDR r3, r3           @ r3<- &fp[BBBB]
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|     VREG_INDEX_TO_ADDR r2, rINST        @ r2<- &fp[AA]
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|     GET_VREG_WIDE_BY_ADDR r0, r1, r3    @ r0/r1<- fp[BBBB]
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|     CLEAR_SHADOW_PAIR rINST, ip, lr     @ Zero out the shadow regs
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|     FETCH_ADVANCE_INST 2                @ advance rPC, load rINST
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|     GET_INST_OPCODE ip                  @ extract opcode from rINST
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|     SET_VREG_WIDE_BY_ADDR r0, r1, r2    @ fp[AA]<- r0/r1
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|     GOTO_OPCODE ip                      @ jump to next instruction
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| 
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| %def op_nop():
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|     FETCH_ADVANCE_INST 1                @ advance to next instr, load rINST
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|     GET_INST_OPCODE ip                  @ ip<- opcode from rINST
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|     GOTO_OPCODE ip                      @ execute it
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| 
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| %def op_unused_3e():
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| %  unused()
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| 
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| %def op_unused_3f():
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| %  unused()
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| 
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| %def op_unused_40():
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| %  unused()
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| 
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| %def op_unused_41():
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| %  unused()
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| 
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| %def op_unused_42():
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| %  unused()
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| 
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| %def op_unused_43():
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| %  unused()
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| 
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| %def op_unused_73():
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| %  unused()
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| 
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| %def op_unused_79():
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| %  unused()
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| 
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| %def op_unused_7a():
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| %  unused()
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| 
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| %def op_unused_e3():
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| %  unused()
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| 
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| %def op_unused_e4():
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| %  unused()
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| 
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| %def op_unused_e5():
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| %  unused()
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| 
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| %def op_unused_e6():
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| %  unused()
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| 
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| %def op_unused_e7():
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| %  unused()
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| 
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| %def op_unused_e8():
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| %  unused()
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| 
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| %def op_unused_e9():
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| %  unused()
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| 
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| %def op_unused_ea():
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| %  unused()
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| 
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| %def op_unused_eb():
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| %  unused()
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| 
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| %def op_unused_ec():
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| %  unused()
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| 
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| %def op_unused_ed():
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| %  unused()
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| 
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| %def op_unused_ee():
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| %  unused()
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| 
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| %def op_unused_ef():
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| %  unused()
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| 
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| %def op_unused_f0():
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| %  unused()
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| 
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| %def op_unused_f1():
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| %  unused()
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| 
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| %def op_unused_f2():
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| %  unused()
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| 
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| %def op_unused_f3():
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| %  unused()
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| 
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| %def op_unused_f4():
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| %  unused()
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| 
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| %def op_unused_f5():
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| %  unused()
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| 
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| %def op_unused_f6():
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| %  unused()
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| 
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| %def op_unused_f7():
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| %  unused()
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| 
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| %def op_unused_f8():
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| %  unused()
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| 
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| %def op_unused_f9():
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| %  unused()
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| 
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| %def op_unused_fc():
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| %  unused()
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| 
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| %def op_unused_fd():
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| %  unused()
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