221 lines
13 KiB
YAML
221 lines
13 KiB
YAML
# Copyright 2019 Google LLC
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#
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# This source code is licensed under the BSD-style license found in the
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# LICENSE file in the root directory of this source tree.
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x4
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x8_acc2
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12_acc2
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x12_acc3
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16_acc2
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x16_acc4
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20_acc2
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_p5_x20_acc5
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init: xnn_init_f32_expminus_neon_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x4
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x8
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x8_acc2
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc2
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc3
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16_acc2
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x16_acc4
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20_acc2
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x20_acc5
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init: xnn_init_f32_expminus_neon_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x4
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x8
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x8_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x12_acc3
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x16_acc4
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x20_acc5
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init: xnn_init_f32_expminus_neonfma_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x4
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x8
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x8_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x12_acc3
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x16_acc4
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20_acc2
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x20_acc5
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init: xnn_init_f32_expminus_neonfma_rr1_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x4
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x8
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x8_acc2
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12_acc2
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x12_acc3
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16_acc2
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x16_acc4
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20_acc2
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__sse2_rr2_p5_x20_acc5
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init: xnn_init_f32_expminus_sse2_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64_acc2
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x64_acc4
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x72
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x72_acc3
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80_acc2
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x80_acc5
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc2
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc3
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx2_rr1_p5_x96_acc6
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init: xnn_init_f32_expminus_avx2_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128_acc2
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x128_acc4
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x144
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x144_acc3
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160_acc2
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x160_acc5
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc2
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc3
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__avx512f_rr1_p5_scalef_x192_acc6
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init: xnn_init_f32_expminus_avx512_rr1_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x4
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x8
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x8_acc2
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc2
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x12_acc3
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16_acc2
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x16_acc4
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20_acc2
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__wasmsimd_rr2_p5_x20_acc5
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init: xnn_init_f32_expminus_wasmsimd_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x1
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x2
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x2_acc2
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4_acc2
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_p5_x4_acc4
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init: xnn_init_f32_expminus_scalar_rr2_p5_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x1
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x2
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x2_acc2
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4_acc2
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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- name: xnn_f32_raddstoreexpminusmax_ukernel__scalar_rr2_lut64_p2_x4_acc4
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init: xnn_init_f32_expminus_scalar_rr2_lut64_p2_params
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