174 lines
3.5 KiB
ArmAsm
174 lines
3.5 KiB
ArmAsm
/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===//
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*
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* The LLVM Compiler Infrastructure
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*
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* This file is dual licensed under the MIT and the University of Illinois Open
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* Source Licenses. See LICENSE.TXT for details.
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*
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*===----------------------------------------------------------------------===//
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*
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* This file implements the __udivsi3 (32-bit unsigned integer divide)
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* function for the ARM 32-bit architecture.
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*
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*===----------------------------------------------------------------------===*/
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#include "../assembly.h"
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.syntax unified
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.text
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#if __ARM_ARCH_ISA_THUMB == 2
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.thumb
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#endif
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.p2align 2
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DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3)
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@ unsigned int __udivsi3(unsigned int divident, unsigned int divisor)
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@ Calculate and return the quotient of the (unsigned) division.
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#if __ARM_ARCH_ISA_THUMB == 2
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DEFINE_COMPILERRT_THUMB_FUNCTION(__udivsi3)
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#else
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DEFINE_COMPILERRT_FUNCTION(__udivsi3)
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#endif
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#if __ARM_ARCH_EXT_IDIV__
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tst r1, r1
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beq LOCAL_LABEL(divby0)
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udiv r0, r0, r1
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bx lr
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#else
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cmp r1, #1
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bcc LOCAL_LABEL(divby0)
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IT(eq)
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JMPc(lr, eq)
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cmp r0, r1
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ITT(cc)
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movcc r0, #0
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JMPc(lr, cc)
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/*
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* Implement division using binary long division algorithm.
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*
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* r0 is the numerator, r1 the denominator.
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*
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* The code before JMP computes the correct shift I, so that
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* r0 and (r1 << I) have the highest bit set in the same position.
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* At the time of JMP, ip := .Ldiv0block - 12 * I.
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* This depends on the fixed instruction size of block.
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* For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes.
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*
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* block(shift) implements the test-and-update-quotient core.
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* It assumes (r0 << shift) can be computed without overflow and
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* that (r0 << shift) < 2 * r1. The quotient is stored in r3.
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*/
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# ifdef __ARM_FEATURE_CLZ
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clz ip, r0
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clz r3, r1
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/* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */
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sub r3, r3, ip
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# if __ARM_ARCH_ISA_THUMB == 2
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adr ip, LOCAL_LABEL(div0block) + 1
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sub ip, ip, r3, lsl #1
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# else
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adr ip, LOCAL_LABEL(div0block)
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# endif
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sub ip, ip, r3, lsl #2
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sub ip, ip, r3, lsl #3
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mov r3, #0
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bx ip
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# else
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# if __ARM_ARCH_ISA_THUMB == 2
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# error THUMB mode requires CLZ or UDIV
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# endif
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mov r2, r0
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adr ip, LOCAL_LABEL(div0block)
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lsr r3, r2, #16
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cmp r3, r1
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movhs r2, r3
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subhs ip, ip, #(16 * 12)
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lsr r3, r2, #8
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cmp r3, r1
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movhs r2, r3
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subhs ip, ip, #(8 * 12)
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lsr r3, r2, #4
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cmp r3, r1
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movhs r2, r3
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subhs ip, #(4 * 12)
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lsr r3, r2, #2
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cmp r3, r1
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movhs r2, r3
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subhs ip, ip, #(2 * 12)
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/* Last block, no need to update r2 or r3. */
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cmp r1, r2, lsr #1
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subls ip, ip, #(1 * 12)
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mov r3, #0
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JMP(ip)
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# endif
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#define IMM #
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#define block(shift) \
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cmp r0, r1, lsl IMM shift; \
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ITT(hs); \
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WIDE(addhs) r3, r3, IMM (1 << shift); \
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WIDE(subhs) r0, r0, r1, lsl IMM shift
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block(31)
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block(30)
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block(29)
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block(28)
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block(27)
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block(26)
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block(25)
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block(24)
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block(23)
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block(22)
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block(21)
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block(20)
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block(19)
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block(18)
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block(17)
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block(16)
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block(15)
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block(14)
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block(13)
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block(12)
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block(11)
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block(10)
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block(9)
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block(8)
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block(7)
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block(6)
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block(5)
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block(4)
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block(3)
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block(2)
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block(1)
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LOCAL_LABEL(div0block):
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block(0)
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mov r0, r3
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JMP(lr)
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#endif /* __ARM_ARCH_EXT_IDIV__ */
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LOCAL_LABEL(divby0):
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mov r0, #0
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#ifdef __ARM_EABI__
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b __aeabi_idiv0
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#else
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JMP(lr)
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#endif
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END_COMPILERRT_FUNCTION(__udivsi3)
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NO_EXEC_STACK_DIRECTIVE
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