164 lines
4.4 KiB
ArmAsm
164 lines
4.4 KiB
ArmAsm
@/******************************************************************************
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@ *
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@ * Copyright (C) 2018 The Android Open Source Project
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@ *
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@ * Licensed under the Apache License, Version 2.0 (the "License");
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@ * you may not use this file except in compliance with the License.
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@ * You may obtain a copy of the License at:
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@ *
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@ * http://www.apache.org/licenses/LICENSE-2.0
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@ *
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@ * Unless required by applicable law or agreed to in writing, software
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@ * distributed under the License is distributed on an "AS IS" BASIS,
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@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@ * See the License for the specific language governing permissions and
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@ * limitations under the License.
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@ *
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@ *****************************************************************************
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@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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@*/
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.text
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.p2align 2
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.global ixheaacd_inv_dit_fft_8pt_armv7
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ixheaacd_inv_dit_fft_8pt_armv7:
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STMFD sp!, {r4-r12, lr}
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LDR r3, [r0, #0]
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LDR r4, [r0, #0x20]
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LDR r5, [r0, #0x24]
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QADD r12, r3, r4
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LDR r6, [r0, #0x30]
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QSUB r8, r3, r4
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LDR r3, [r0, #4]
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LDR r9, [r0, #0x34]
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QADD r4, r3, r5
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SUB sp, sp, #0x14
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QSUB r5, r3, r5
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LDR lr, [r0, #0x10]
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LDR r3, [r0, #0x14]
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QADD r10, lr, r6
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QSUB r6, lr, r6
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QADD r7, r3, r9
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QSUB r9, r3, r9
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QADD r3, r12, r10
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QSUB lr, r12, r10
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QADD r12, r4, r7
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QSUB r7, r4, r7
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QSUB r4, r8, r9
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STR r7, [sp, #8]
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QADD r7, r8, r9
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QADD r8, r5, r6
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STR r7, [sp, #0xc]
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QSUB r5, r5, r6
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STMIA sp, {r8, lr}
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STR r5, [sp, #0x10]
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LDR r5, [r0, #8]
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LDR lr, [r0, #0x28]
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LDR r9, [r0, #0x2c]
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QADD r7, r5, lr
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LDR r11, [r0, #0x38]
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LDR r6, [r0, #0xc]
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QSUB r5, r5, lr
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LDR lr, [r0, #0x18]
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QADD r8, r6, r9
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QSUB r6, r6, r9
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QADD r10, lr, r11
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QSUB r9, lr, r11
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LDR r11, [r0, #0x1c]
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LDR r0, [r0, #0x3c]
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MOV lr, r11
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QADD r11, r11, r0
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QSUB r0, lr, r0
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QADD lr, r7, r10
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QSUB r10, r7, r10
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QADD r7, r8, r11
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QSUB r11, r8, r11
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QSUB r8, r5, r0
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QADD r5, r5, r0
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QADD r0, r6, r9
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QSUB r6, r6, r9
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QADD r9, r3, lr
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QSUB r3, r3, lr
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STR r9, [r1, #0]
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QADD r9, r12, r7
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LDR lr, [sp, #4]
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STR r9, [r2, #0]
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QSUB r9, r12, r7
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QSUB r12, lr, r11
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QADD r11, lr, r11
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LDR lr, [sp, #8]
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STR r11, [r1, #0x10]
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QADD r7, lr, r10
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QSUB r10, lr, r10
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MOVW r11, #0x00005a82
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STR r10, [r2, #0x10]
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QSUB r10, r8, r0
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QADD r0, r8, r0
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SMULWB r10, r10, r11
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SMULWB r0, r0, r11
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MOV r10, r10, LSL #1
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QADD r8, r4, r10
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LDR lr, [sp, #0]
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STR r8, [r1, #4]
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MOV r0, r0, LSL #1
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QADD r8, lr, r0
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QSUB r4, r4, r10
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STR r8, [r2, #4]
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QSUB r0, lr, r0
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QADD r12, r12, r4
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QADD r0, r7, r0
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STR r12, [r1, #8]
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STR r0, [r2, #8]
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QADD r0, r5, r6
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LDR r7, [sp, #0xc]
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SMULWB r0, r0, r11
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QSUB r12, r5, r6
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MOV r0, r0, LSL #1
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SMULWB r12, r12, r11
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LDR r5, [sp, #0x10]
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QSUB r4, r7, r0
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MOV r12, r12, LSL #1
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QADD r10, r5, r12
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QADD r3, r3, r4
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QADD lr, r9, r10
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QADD r0, r7, r0
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QSUB r10, r5, r12
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STR r3, [r1, #0xc]
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STR lr, [r2, #0xc]
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STR r0, [r1, #0x14]
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STR r10, [r2, #0x14]
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ADD sp, sp, #0x14
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LDMFD sp!, {r4-r12, pc}
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