111 lines
3.0 KiB
ArmAsm
111 lines
3.0 KiB
ArmAsm
@/******************************************************************************
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@ *
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@ * Copyright (C) 2018 The Android Open Source Project
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@ *
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@ * Licensed under the Apache License, Version 2.0 (the "License");
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@ * you may not use this file except in compliance with the License.
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@ * You may obtain a copy of the License at:
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@ *
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@ * http://www.apache.org/licenses/LICENSE-2.0
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@ *
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@ * Unless required by applicable law or agreed to in writing, software
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@ * distributed under the License is distributed on an "AS IS" BASIS,
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@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@ * See the License for the specific language governing permissions and
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@ * limitations under the License.
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@ *
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@ *****************************************************************************
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@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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@*/
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.text
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.p2align 2
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.global ixheaacd_neg_shift_spec_armv7
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ixheaacd_neg_shift_spec_armv7:
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STMFD sp!, {R4-R12, R14}
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VPUSH {D8 - D15}
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MOV R5, #448
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SUB R6, R5, #1
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MOV R6, R6, LSL #2
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ADD R6, R6, R0
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MOV R8, #-16
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SUB R6, R6, #12
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MOV R7, R3, LSL #1
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VDUP.32 Q1, R2
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MOV R4, #0x8000
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VDUP.32 Q2, R4
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VLD1.32 {D0, D1}, [R6], R8
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VQNEG.S32 Q0, Q0
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VLD1.32 {D6, D7}, [R6], R8
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VQSHL.S32 Q15, Q0, Q1
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VQADD.S32 Q14, Q15, Q2
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VSHR.S32 Q13, Q14, #16
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VREV64.32 Q13, Q13
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SUB R5, R5, #8
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VUZP.16 D27, D26
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VQNEG.S32 Q3, Q3
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LOOP_1:
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VST1.16 D27[0], [R1], R7
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VQSHL.S32 Q12, Q3, Q1
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VLD1.32 {D0, D1}, [R6], R8
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VST1.16 D27[1], [R1], R7
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VQADD.S32 Q11, Q12, Q2
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VST1.16 D27[2], [R1], R7
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VQNEG.S32 Q0, Q0
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VST1.16 D27[3], [R1], R7
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VSHR.S32 Q10, Q11, #16
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VREV64.32 Q10, Q10
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SUBS R5, R5, #8
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VUZP.16 D21, D20
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VQSHL.S32 Q15, Q0, Q1
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VST1.16 D21[0], [R1], R7
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VLD1.32 {D6, D7}, [R6], R8
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VQADD.S32 Q14, Q15, Q2
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VST1.16 D21[1], [R1], R7
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VSHR.S32 Q13, Q14, #16
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VST1.16 D21[2], [R1], R7
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VREV64.32 Q13, Q13
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VST1.16 D21[3], [R1], R7
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VUZP.16 D27, D26
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VQNEG.S32 Q3, Q3
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BGT LOOP_1
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VST1.16 D27[0], [R1], R7
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VQSHL.S32 Q12, Q3, Q1
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VST1.16 D27[1], [R1], R7
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VST1.16 D27[2], [R1], R7
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VQADD.S32 Q11, Q12, Q2
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VST1.16 D27[3], [R1], R7
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VSHR.S32 Q10, Q11, #16
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VREV64.32 Q10, Q10
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VUZP.16 D21, D20
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VST1.16 D21[0], [R1], R7
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VST1.16 D21[1], [R1], R7
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VST1.16 D21[2], [R1], R7
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VST1.16 D21[3], [R1], R7
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VPOP {D8 - D15}
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LDMFD sp!, {R4-R12, R15}
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.end
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