124 lines
4.0 KiB
ArmAsm
124 lines
4.0 KiB
ArmAsm
///******************************************************************************
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// *
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// * Copyright (C) 2018 The Android Open Source Project
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// *
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// * Licensed under the Apache License, Version 2.0 (the "License");
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// * you may not use this file except in compliance with the License.
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// * You may obtain a copy of the License at:
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// *
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// * http://www.apache.org/licenses/LICENSE-2.0
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// *
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// * Unless required by applicable law or agreed to in writing, software
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// * distributed under the License is distributed on an "AS IS" BASIS,
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// * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// * See the License for the specific language governing permissions and
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// * limitations under the License.
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// *
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// *****************************************************************************
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// * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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//*/
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.macro push_v_regs
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stp q8, q9, [sp, #-32]!
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stp q10, q11, [sp, #-32]!
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stp q12, q13, [sp, #-32]!
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stp q14, q15, [sp, #-32]!
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stp X8, X9, [sp, #-16]!
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stp X10, X11, [sp, #-16]!
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stp X12, X13, [sp, #-16]!
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stp X14, X15, [sp, #-16]!
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stp X16, X17, [sp, #-16]!
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stp X29, X30, [sp, #-16]!
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.endm
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.macro pop_v_regs
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ldp X29, X30, [sp], #16
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ldp X16, X17, [sp], #16
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ldp X14, X15, [sp], #16
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ldp X12, X13, [sp], #16
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ldp X10, X11, [sp], #16
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ldp X8, X9, [sp], #16
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ldp q14, q15, [sp], #32
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ldp q12, q13, [sp], #32
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ldp q10, q11, [sp], #32
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ldp q8, q9, [sp], #32
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.endm
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.text
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.global ixheaacd_neg_shift_spec_armv8
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ixheaacd_neg_shift_spec_armv8:
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push_v_regs
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MOV X5, #448
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SUB X6, X5, #1
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LSL X6, X6, #2
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ADD X6, X6, X0
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MOV X8, #-16
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SUB X6, X6, #12
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LSL X7, X3, #1
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DUP V31.4S, W2
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MOV W4, #0x8000
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DUP V30.4S, W4
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LD1 {V0.4S}, [X6], X8
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SQNEG V0.4S, V0.4S
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LD1 {V6.4S}, [X6], X8
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SQSHL V25.4S, V0.4S, V31.4S
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SQADD V24.4S, V25.4S, V30.4S
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SSHR V23.4S, V24.4S, #16
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REV64 V23.4S, V23.4S
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SUB X5, X5, #8
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UZP1 V27.8H, V23.8H, V23.8H
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SQNEG V29.4S, V6.4S
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LOOP_1:
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ST1 {V27.H}[2], [X1], X7
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SQSHL V22.4S, V29.4S, V31.4S
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LD1 {V0.4S}, [X6], X8
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ST1 {V27.H}[3], [X1], X7
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SQADD V21.4S, V22.4S, V30.4S
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ST1 {V27.H}[0], [X1], X7
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SQNEG V0.4S, V0.4S
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ST1 {V27.H}[1], [X1], X7
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SSHR V20.4S, V21.4S, #16
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REV64 V20.4S, V20.4S
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SUBS X5, X5, #8
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UZP1 V27.8H, V20.8H, V20.8H
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SQSHL V25.4S, V0.4S, V31.4S
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ST1 {V27.H}[2], [X1], X7
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LD1 {V6.4S}, [X6], X8
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SQADD V24.4S, V25.4S, V30.4S
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ST1 {V27.H}[3], [X1], X7
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SSHR V23.4S, V24.4S, #16
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ST1 {V27.H}[0], [X1], X7
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REV64 V23.4S, V23.4S
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ST1 {V27.H}[1], [X1], X7
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UZP1 V27.8H, V23.8H, V23.8H
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SQNEG V29.4S, V6.4S
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BGT LOOP_1
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ST1 {V27.H}[2], [X1], X7
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SQSHL V22.4S, V29.4S, V31.4S
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ST1 {V27.H}[3], [X1], X7
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ST1 {V27.H}[0], [X1], X7
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SQADD V21.4S, V22.4S, V30.4S
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ST1 {V27.H}[1], [X1], X7
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SSHR V20.4S, V21.4S, #16
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REV64 V20.4S, V20.4S
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UZP1 V27.8H, V20.8H, V20.8H
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ST1 {V27.H}[2], [X1], X7
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ST1 {V27.H}[3], [X1], X7
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ST1 {V27.H}[0], [X1], X7
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ST1 {V27.H}[1], [X1], X7
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pop_v_regs
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RET
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