149 lines
4.4 KiB
ArmAsm
149 lines
4.4 KiB
ArmAsm
//.include "ihevc_neon_macros.s"
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.macro push_v_regs
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stp x8, x9, [sp, #-16]!
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stp x10, X11, [sp, #-16]!
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stp X12, X13, [sp, #-16]!
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stp X14, X15, [sp, #-16]!
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stp X29, X30, [sp, #-16]!
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.endm
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.macro pop_v_regs
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ldp X29, X30, [sp], #16
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ldp X14, X15, [sp], #16
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ldp X12, X13, [sp], #16
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ldp X10, X11, [sp], #16
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ldp X8, X9, [sp], #16
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.endm
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.text
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.p2align 2
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.global ixheaacd_postradixcompute4
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ixheaacd_postradixcompute4:
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// STMFD sp!, {x4-x12, x14}
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push_v_regs
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//SUB sp, sp, #16
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//HARD CODED for FFT Length of 16
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// x3 is always 16
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//SUB x4, x3, #2 ; y to y offset calculated
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//MOV x4, #14
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//STR x4, [sp, #8] ; (npoints / 2)*4bytes - 4bytes
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//STR x0, [sp, #12] ; (3*(npoints/2))*4bytes - 4bytes
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// x0 to x2 offset (npoints / 2)*4bytes
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ADD x4, x1, x3, lsl #1 // x1 -> x0, x4 -> x2
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MOV x3, #2
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POSTRADIX4_START:
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// LDMIA x1!, {x5-x12} // x_0 :x_7
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LDP w5, w6, [x1], #8 // x_0 :x_1
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LDP w7, w8, [x1], #8 // x_2 :x_3
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LDP w9, w10, [x1], #8 // x_4 :x_5
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LDP w11, w12, [x1], #8 // x_6 :x_7
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ADD w14, w5, w9 // xh0_0 = x_0 + x_4
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SUB w5, w5, w9 // xl0_0 = x_0 - x_4
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ADD w9, w6, w10 // xh1_0 = x_1 + x_5
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SUB w6, w6, w10 // xl1_0 = x_1 - x_5
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ADD w10, w7, w11 // xh0_1 = x_2 + x_6
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SUB w7, w7, w11 // xl0_1 = x_2 - x_6
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ADD w11, w8, w12 // xh1_1 = x_3 + x_7
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SUB w8, w8, w12 // xl1_1 = x_3 - x_7
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ADD w12, w14, w10 // n00 = xh0_0 + xh0_1
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SUB w14, w14, w10 // n20 = xh0_0 - xh0_1
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ADD w10, w9, w11 // n01 = xh1_0 + xh1_1
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SUB w9, w9, w11 // n21 = xh1_0 - xh1_1
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ADD w11, w5, w8 // n10 = xl0_0 + xl1_1
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SUB w5, w5, w8 // n30 = xl0_0 - xl1_1
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ADD w8, w6, w7 // n31 = xl1_0 + xl0_1
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SUB w6, w6, w7 // n11 = xl1_0 - xl0_1
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STR w12, [x0], #4 // y0[h2] = n00, x7 -> y0[h2 + 1]
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STR w10, [x0], #14<<1 // y0[h2 + 1] = n01, x7 -> y1[h2]
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STR w11, [x0], #4 // y1[h2] = n10, x7 -> y1[h2 + 1]
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STR w6 , [x0], #14<<1 // y1[h2 + 1] = n11, x7 -> y2[h2]
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STR w14, [x0], #4 // y2[h2] = n20, x7 -> y2[h2 + 1]
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STR w9 , [x0], #14<<1 // y2[h2 + 1] = n21, x7 -> y3[h2]
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STR w5, [x0], #4 // y3[h2] = n30, x7 -> y3[h2 + 1]
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STR w8, [x0], #0 // y3[h2 + 1] = n31, x7 -> y0[h2+2]
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// LDMIA x4!, {x5-x12} // x_0 :x_7
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LDP w5, w6, [x4], #8 // x_8 :x_8
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LDP w7, w8, [x4], #8 // x_a :x_b
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LDP w9, w10, [x4], #8 // x_c :x_d
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LDP w11, w12, [x4], #8 // x_e :x_f
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SUB x0, x0, #92 // #4*3 + #14<<1 * 3 - 8
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ADD w14, w5, w9
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SUB w5, w5, w9
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ADD w9, w6, w10
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SUB w6, w6, w10
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ADD w10, w7, w11
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SUB w7, w7, w11
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ADD w11, w8, w12
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SUB w8, w8, w12
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ADD w12, w14, w10
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SUB w14, w14, w10
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ADD w10, w9, w11
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SUB w9, w9, w11
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ADD w11, w5, w8
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SUB w5, w5, w8
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ADD w8, w6, w7
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SUB w6, w6, w7
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STR w12, [x0], #4
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STR w10, [x0], #14<<1
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STR w11, [x0], #4
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STR w6, [x0], #14<<1
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STR w14, [x0], #4
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STR w9, [x0], #14<<1
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STR w5, [x0], #4
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STR w8, [x0], #0
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ADD x1, x1, #1 << 5 // x0 += (Word32) npoints >> 1
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ADD x4, x4, #1 << 5 // x2 += (Word32) npoints >> 1
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SUB x0, x0, #100-8
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SUBS w3, w3, #1
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BGT POSTRADIX4_START
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// LDMFD sp!, {x4-x12, x15}
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pop_v_regs
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ret
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