80 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
			
		
		
	
	
			80 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
| .macro push_v_regs
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|     stp             X8, X9, [sp, #-16]!
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|     stp             X10, X11, [sp, #-16]!
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|     stp             X12, X13, [sp, #-16]!
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|     stp             X14, X15, [sp, #-16]!
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|     stp             X20, X21, [sp, #-16]!
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|     stp             X26, X17, [sp, #-16]!
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|     stp             X27, X28, [sp, #-16]!
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|     stp             q2, q3, [sp, #-32]!
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|     stp             q0, q1, [sp, #-32]!
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| .endm
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| .macro pop_v_regs
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|     ldp             q0, q1, [sp], #32
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|     ldp             q2, q3, [sp], #32
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|     ldp             X27, X28, [sp], #16
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|     ldp             X26, X17, [sp], #16
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|     ldp             X20, X21, [sp], #16
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|     ldp             X14, X15, [sp], #16
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|     ldp             X12, X13, [sp], #16
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|     ldp             X10, X11, [sp], #16
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|     ldp             X8, X9, [sp], #16
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| .endm
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| 
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| .text
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| .p2align 2
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|     .global ixheaacd_shiftrountine_with_rnd_eld
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| ixheaacd_shiftrountine_with_rnd_eld:
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|     push_v_regs
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| 
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|     ADD             x12, x2, x3, LSL #1
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|     MOV             W9, #0x00008000
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|     DUP             V0.4s, w9
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|     MOVI            v3.4s, #9
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|     MOV             W27, #0x80000000
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|     MOV             W28, #0x7fffffff
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|     MOV             W26, #0
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|     SUBS            W3, W3, #1
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|     BMI             S_WITH_R_L6
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| 
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| S_WITH_R_L5:
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|     LDR             w5, [x1, x3, LSL #2] //i2 = qmfImag[j]
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|     LDR             w7, [x0, x3, LSL #2] //x2 = qmfReal[j]
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|     LDR             w14, [x0], #4       //x1 = *qmfReal
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|     LDR             w10, [x1], #4       //i1 = *qmfImag
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| 
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|     ADD             w6, w5, w7          //*qmfImag++ = add32(i2, x2)
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|     MVN             w6, w6
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|     ADD             w6, w6, #1
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|     SUB             w5, w7, w5          //qmfReal[j] = sub32(i2, x2)
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|     ADD             w7, w10, w14        //qmfImag[j] = add32(i1, x1)
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|     MVN             w7, w7
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|     ADD             w7, w7, #1
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|     SUB             w4, w14, w10        //*qmfReal++ = sub32(i1, x1)
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| 
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| 
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| 
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|     MOV             v1.s[0], W4         //QADD        x4, x4, x9
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|     MOV             v1.s[1], W5         //QADD        x4, x4, x9
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|     MOV             v1.s[2], W6         //QADD        x4, x4, x9
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|     MOV             v1.s[3], W7         //QADD        x4, x4, x9
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|     lsl             w14, w3, #1
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| 
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|     SQSHL           v1.4s, v1.4s, v3.4s
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|     ADD             X17, X2, X14
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| 
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|     SQADD           v2.4s, v1.4s, v0.4s
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| 
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|     ST1             {v2.h}[1], [x2], #2
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|     ST1             {v2.h}[3], [X17]
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|     ADD             X17, X12, X14
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|     ST1             {v2.h}[7], [x17]    //STRH   w7, [x12, x14]
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|     ST1             {v2.h}[5], [x12], #2 //STRH   w6, [x12], #2
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| 
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|     SUBS            x3, x3, #2
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| 
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|     BGE             S_WITH_R_L5
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| S_WITH_R_L6:
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|     pop_v_regs
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|     ret
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