64 lines
1.8 KiB
LLVM
64 lines
1.8 KiB
LLVM
; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
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; REQUIRES: global-isel
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; This file checks that the translation from llvm IR to generic MachineInstr
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; is correct.
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-apple-ios"
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; Tests for add.
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; CHECK: name: addi64
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; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
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; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1
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; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_ADD i64 [[ARG1]], [[ARG2]]
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; CHECK-NEXT: %x0 = COPY [[RES]]
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; CHECK-NEXT: RET_ReallyLR implicit %x0
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define i64 @addi64(i64 %arg1, i64 %arg2) {
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%res = add i64 %arg1, %arg2
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ret i64 %res
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}
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; Tests for br.
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; CHECK: name: uncondbr
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; CHECK: body:
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;
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; Entry basic block.
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; CHECK: {{[0-9a-zA-Z._-]+}}:
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;
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; Make sure we have one successor and only one.
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; CHECK-NEXT: successors: %[[END:[0-9a-zA-Z._-]+]]({{0x[a-f0-9]+ / 0x[a-f0-9]+}} = 100.00%)
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;
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; Check that we emit the correct branch.
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; CHECK: G_BR label %[[END]]
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;
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; Check that end contains the return instruction.
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; CHECK: [[END]]:
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; CHECK-NEXT: RET_ReallyLR
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define void @uncondbr() {
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br label %end
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end:
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ret void
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}
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; Tests for or.
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; CHECK: name: ori64
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; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
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; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1
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; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_OR i64 [[ARG1]], [[ARG2]]
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; CHECK-NEXT: %x0 = COPY [[RES]]
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; CHECK-NEXT: RET_ReallyLR implicit %x0
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define i64 @ori64(i64 %arg1, i64 %arg2) {
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%res = or i64 %arg1, %arg2
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ret i64 %res
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}
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; CHECK: name: ori32
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; CHECK: [[ARG1:%[0-9]+]](32) = COPY %w0
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; CHECK-NEXT: [[ARG2:%[0-9]+]](32) = COPY %w1
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; CHECK-NEXT: [[RES:%[0-9]+]](32) = G_OR i32 [[ARG1]], [[ARG2]]
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; CHECK-NEXT: %w0 = COPY [[RES]]
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; CHECK-NEXT: RET_ReallyLR implicit %w0
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define i32 @ori32(i32 %arg1, i32 %arg2) {
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%res = or i32 %arg1, %arg2
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ret i32 %res
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}
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