103 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			103 lines
		
	
	
		
			3.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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| ; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X32
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| ; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X32
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| ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=X64
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| ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefix=X64
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| 
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| ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse4a-builtins.c
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| 
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| define <2 x i64> @test_mm_extracti_si64(<2 x i64> %x) {
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| ; X32-LABEL: test_mm_extracti_si64:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    extrq $2, $3, %xmm0
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_mm_extracti_si64:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    extrq $2, $3, %xmm0
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| ; X64-NEXT:    retq
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|   %res = call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %x, i8 3, i8 2)
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|   ret <2 x i64> %res
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| }
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| declare <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64>, i8, i8) nounwind readnone
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| 
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| define <2 x i64> @test_mm_extract_si64(<2 x i64> %x, <2 x i64> %y) {
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| ; X32-LABEL: test_mm_extract_si64:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    extrq %xmm1, %xmm0
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_mm_extract_si64:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    extrq %xmm1, %xmm0
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| ; X64-NEXT:    retq
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|   %bc = bitcast <2 x i64> %y to <16 x i8>
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|   %res = call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %x, <16 x i8> %bc)
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|   ret <2 x i64> %res
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| }
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| declare <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64>, <16 x i8>) nounwind readnone
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| 
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| define <2 x i64> @test_mm_inserti_si64(<2 x i64> %x, <2 x i64> %y) {
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| ; X32-LABEL: test_mm_inserti_si64:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    insertq $6, $5, %xmm1, %xmm0
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_mm_inserti_si64:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    insertq $6, $5, %xmm1, %xmm0
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| ; X64-NEXT:    retq
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|   %res = call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %x, <2 x i64> %y, i8 5, i8 6)
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|   ret <2 x i64> %res
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| }
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| declare <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64>, <2 x i64>, i8, i8) nounwind readnone
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| 
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| define <2 x i64> @test_mm_insert_si64(<2 x i64> %x, <2 x i64> %y) {
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| ; X32-LABEL: test_mm_insert_si64:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    insertq %xmm1, %xmm0
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_mm_insert_si64:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    insertq %xmm1, %xmm0
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| ; X64-NEXT:    retq
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|   %res = call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y)
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|   ret <2 x i64> %res
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| }
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| declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind readnone
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| 
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| define void @test_stream_sd(double* %p, <2 x double> %a) {
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| ; X32-LABEL: test_stream_sd:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
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| ; X32-NEXT:    movntsd %xmm0, (%eax)
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_stream_sd:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movntsd %xmm0, (%rdi)
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| ; X64-NEXT:    retq
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|   %1 = extractelement <2 x double> %a, i64 0
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|   store double %1, double* %p, align 1, !nontemporal !1
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|   ret void
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| }
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| 
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| define void @test_mm_stream_ss(float* %p, <4 x float> %a) {
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| ; X32-LABEL: test_mm_stream_ss:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
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| ; X32-NEXT:    movntss %xmm0, (%eax)
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: test_mm_stream_ss:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movntss %xmm0, (%rdi)
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| ; X64-NEXT:    retq
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|   %1 = extractelement <4 x float> %a, i64 0
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|   store float %1, float* %p, align 1, !nontemporal !1
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|   ret void
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| }
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| 
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| !1 = !{i32 1}
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