153 lines
6.0 KiB
LLVM
153 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE
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define <8 x float> @foo1_8(<8 x i8> %src) {
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; CHECK-LABEL: foo1_8:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4,4,5,5,6,6,7,7]
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; CHECK-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; CHECK-NEXT: vpslld $24, %xmm0, %xmm0
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; CHECK-NEXT: vpsrad $24, %xmm0, %xmm0
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; CHECK-NEXT: vpslld $24, %xmm1, %xmm1
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; CHECK-NEXT: vpsrad $24, %xmm1, %xmm1
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo1_8:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm1
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; CHECK-WIDE-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm0
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; CHECK-WIDE-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; CHECK-WIDE-NEXT: vcvtdq2ps %ymm0, %ymm0
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; CHECK-WIDE-NEXT: retl
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%res = sitofp <8 x i8> %src to <8 x float>
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ret <8 x float> %res
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}
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define <4 x float> @foo1_4(<4 x i8> %src) {
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; CHECK-LABEL: foo1_4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpslld $24, %xmm0, %xmm0
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; CHECK-NEXT: vpsrad $24, %xmm0, %xmm0
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; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo1_4:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm0
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; CHECK-WIDE-NEXT: vcvtdq2ps %xmm0, %xmm0
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; CHECK-WIDE-NEXT: retl
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%res = sitofp <4 x i8> %src to <4 x float>
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ret <4 x float> %res
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}
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define <8 x float> @foo2_8(<8 x i8> %src) {
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; CHECK-LABEL: foo2_8:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpand LCPI2_0, %xmm0, %xmm0
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; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; CHECK-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo2_8:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; CHECK-WIDE-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; CHECK-WIDE-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; CHECK-WIDE-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; CHECK-WIDE-NEXT: vcvtdq2ps %ymm0, %ymm0
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; CHECK-WIDE-NEXT: retl
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%res = uitofp <8 x i8> %src to <8 x float>
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ret <8 x float> %res
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}
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define <4 x float> @foo2_4(<4 x i8> %src) {
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; CHECK-LABEL: foo2_4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vandps LCPI3_0, %xmm0, %xmm0
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; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo2_4:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; CHECK-WIDE-NEXT: vcvtdq2ps %xmm0, %xmm0
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; CHECK-WIDE-NEXT: retl
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%res = uitofp <4 x i8> %src to <4 x float>
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ret <4 x float> %res
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}
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define <8 x i8> @foo3_8(<8 x float> %src) {
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; CHECK-LABEL: foo3_8:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo3_8:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
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; CHECK-WIDE-NEXT: vpinsrb $0, %eax, %xmm0, %xmm1
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; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilps {{.*#+}} xmm2 = xmm0[3,1,2,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vextractf128 $1, %ymm0, %xmm0
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; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
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; CHECK-WIDE-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
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; CHECK-WIDE-NEXT: vpinsrb $7, %eax, %xmm1, %xmm0
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; CHECK-WIDE-NEXT: vzeroupper
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; CHECK-WIDE-NEXT: retl
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%res = fptosi <8 x float> %src to <8 x i8>
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ret <8 x i8> %res
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}
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define <4 x i8> @foo3_4(<4 x float> %src) {
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; CHECK-LABEL: foo3_4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvttps2dq %xmm0, %xmm0
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; CHECK-NEXT: retl
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;
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; CHECK-WIDE-LABEL: foo3_4:
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; CHECK-WIDE: ## BB#0:
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; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
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; CHECK-WIDE-NEXT: vpinsrb $0, %eax, %xmm0, %xmm1
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; CHECK-WIDE-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
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; CHECK-WIDE-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
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; CHECK-WIDE-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
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; CHECK-WIDE-NEXT: vpinsrb $3, %eax, %xmm1, %xmm0
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; CHECK-WIDE-NEXT: retl
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%res = fptosi <4 x float> %src to <4 x i8>
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ret <4 x i8> %res
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}
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