111 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			111 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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| ; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
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| ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
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| 
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| ; Inserts and extracts with variable indices must be lowered
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| ; to memory accesses.
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| 
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| define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
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| ; X32-LABEL: t0:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    pushl %ebp
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| ; X32-NEXT:    movl %esp, %ebp
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| ; X32-NEXT:    andl $-16, %esp
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| ; X32-NEXT:    subl $32, %esp
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| ; X32-NEXT:    movaps %xmm0, (%esp)
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| ; X32-NEXT:    movl $76, (%esp,%eax,4)
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| ; X32-NEXT:    movl (%esp), %eax
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| ; X32-NEXT:    movl %ebp, %esp
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| ; X32-NEXT:    popl %ebp
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: t0:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movaps %xmm0, -{{[0-9]+}}(%rsp)
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| ; X64-NEXT:    movslq %edi, %rax
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| ; X64-NEXT:    movl $76, -24(%rsp,%rax,4)
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| ; X64-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
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| ; X64-NEXT:    retq
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|   %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
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|   %t9 = extractelement <4 x i32> %t13, i32 0
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|   ret i32 %t9
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| }
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| 
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| define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
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| ; X32-LABEL: t1:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    pushl %ebp
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| ; X32-NEXT:    movl %esp, %ebp
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| ; X32-NEXT:    andl $-16, %esp
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| ; X32-NEXT:    subl $32, %esp
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| ; X32-NEXT:    movl $76, %ecx
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| ; X32-NEXT:    pinsrd $0, %ecx, %xmm0
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| ; X32-NEXT:    movdqa %xmm0, (%esp)
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| ; X32-NEXT:    movl (%esp,%eax,4), %eax
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| ; X32-NEXT:    movl %ebp, %esp
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| ; X32-NEXT:    popl %ebp
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: t1:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movl $76, %eax
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| ; X64-NEXT:    pinsrd $0, %eax, %xmm0
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| ; X64-NEXT:    movdqa %xmm0, -{{[0-9]+}}(%rsp)
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| ; X64-NEXT:    movslq %edi, %rax
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| ; X64-NEXT:    movl -24(%rsp,%rax,4), %eax
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| ; X64-NEXT:    retq
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|   %t13 = insertelement <4 x i32> %t8, i32 76, i32 0
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|   %t9 = extractelement <4 x i32> %t13, i32 %t7
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|   ret i32 %t9
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| }
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| 
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| define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
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| ; X32-LABEL: t2:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    pushl %ebp
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| ; X32-NEXT:    movl %esp, %ebp
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| ; X32-NEXT:    andl $-16, %esp
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| ; X32-NEXT:    subl $32, %esp
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| ; X32-NEXT:    movdqa %xmm0, (%esp)
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| ; X32-NEXT:    pinsrd $0, (%esp,%eax,4), %xmm0
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| ; X32-NEXT:    movl %ebp, %esp
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| ; X32-NEXT:    popl %ebp
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: t2:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movdqa %xmm0, -{{[0-9]+}}(%rsp)
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| ; X64-NEXT:    movslq %edi, %rax
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| ; X64-NEXT:    pinsrd $0, -24(%rsp,%rax,4), %xmm0
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| ; X64-NEXT:    retq
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|   %t9 = extractelement <4 x i32> %t8, i32 %t7
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|   %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0
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|   ret <4 x i32> %t13
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| }
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| 
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| define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
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| ; X32-LABEL: t3:
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| ; X32:       # BB#0:
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| ; X32-NEXT:    pushl %ebp
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| ; X32-NEXT:    movl %esp, %ebp
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| ; X32-NEXT:    andl $-16, %esp
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| ; X32-NEXT:    subl $32, %esp
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| ; X32-NEXT:    movaps %xmm0, (%esp)
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| ; X32-NEXT:    movd %xmm0, (%esp,%eax,4)
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| ; X32-NEXT:    movaps (%esp), %xmm0
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| ; X32-NEXT:    movl %ebp, %esp
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| ; X32-NEXT:    popl %ebp
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| ; X32-NEXT:    retl
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| ;
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| ; X64-LABEL: t3:
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| ; X64:       # BB#0:
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| ; X64-NEXT:    movaps %xmm0, -{{[0-9]+}}(%rsp)
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| ; X64-NEXT:    movslq %edi, %rax
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| ; X64-NEXT:    movd %xmm0, -24(%rsp,%rax,4)
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| ; X64-NEXT:    movaps -{{[0-9]+}}(%rsp), %xmm0
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| ; X64-NEXT:    retq
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|   %t9 = extractelement <4 x i32> %t8, i32 0
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|   %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
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|   ret <4 x i32> %t13
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| }
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